| /libcore/luni/src/main/native/ |
| Register.cpp | 25 // DalvikVM calls this on startup, so we can statically register all our native methods.
35 #define REGISTER(FN) extern void FN(JNIEnv*); FN(env)
36 REGISTER(register_android_system_OsConstants);
37 REGISTER(register_java_io_File);
38 REGISTER(register_java_io_FileDescriptor);
39 REGISTER(register_java_io_ObjectStreamClass);
40 REGISTER(register_java_lang_Character);
41 REGISTER(register_java_lang_Double);
42 REGISTER(register_java_lang_Float);
43 REGISTER(register_java_lang_Math)
[all...] |
| /external/clang/test/SemaCXX/Inputs/ |
| register.h | 4 inline void f() { register int k; }
5 #define to_int(x) ({ register int n = (x); n; })
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/X11/ |
| ImUtil.h | 18 register XImage *dstimg,
19 register int x,
20 register int y);
24 register unsigned char *bpt,
25 register int nb);
28 register XImage *image);
|
| /art/compiler/utils/mips/ |
| assembler_mips.h | 58 void Add(Register rd, Register rs, Register rt);
59 void Addu(Register rd, Register rs, Register rt);
60 void Addi(Register rt, Register rs, uint16_t imm16);
61 void Addiu(Register rt, Register rs, uint16_t imm16)
[all...] |
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/sysroot/usr/include/X11/ |
| ImUtil.h | 19 register XImage *dstimg,
20 register int x,
21 register int y);
25 register unsigned char *bpt,
26 register int nb);
29 register XImage *image);
|
| /art/test/404-optimizing-allocator/ |
| info.txt | 1 Initial tests for testing the optimizing compiler's register allocator.
|
| /art/test/405-optimizing-long-allocator/ |
| info.txt | 1 Tests with long for the optimizing compiler's register allocator.
|
| /art/test/482-checker-loop-back-edge-use/ |
| info.txt | 1 Tests the register allocator's optimization of adding synthesized uses
|
| /art/test/705-register-conflict/ |
| info.txt | 1 Tests if blocked fp register work correctly on optimizing compiler.
|
| /art/compiler/utils/arm/ |
| assembler_arm32.h | 42 void and_(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
44 void eor(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
46 void sub(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
47 void subs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
49 void rsb(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE
[all...] |
| assembler_thumb2.h | 64 void and_(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
66 void eor(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
68 void sub(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
69 void subs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
71 void rsb(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE
[all...] |
| /external/valgrind/none/tests/s390x/ |
| svc.h | 9 register int _num asm("1") = num;
10 register long ret asm("2");
22 register int _num asm("1") = num;
23 register long ret asm("2");
24 register unsigned long _arg1 asm("2") = arg1;
36 register int _num asm("1") = num;
37 register long ret asm("2");
38 register unsigned long _arg1 asm("2") = arg1;
39 register unsigned long _arg2 asm("3") = arg2;
52 register int _num asm("1") = num
[all...] |
| /external/v8/src/mips64/ |
| assembler-mips64.h | 53 // the register initialization to depend on the particular initialization
56 // "initialization". Also, the Register objects cannot be const as this
70 // Implementation of Register and FPURegister.
72 // Core register.
73 struct Register {
77 static const int kCpRegister = 23; // cp (s7) is the 23rd register.
81 static int ToAllocationIndex(Register reg) {
89 static Register FromAllocationIndex(int index) {
92 from_code(kCpRegister) : // Last index is always the 'cp' register.
117 static Register from_code(int code)
[all...] |
| macro-assembler-mips64.h | 18 // Reserved Register Usage Summary.
25 // Per the MIPS ABI, register t9 must be used for indirect function call
27 // trying to update gp register for position-independent-code. Whenever
28 // MIPS generated code calls C code, it must be via t9 register.
86 Register GetRegisterThatIsNotOneOf(Register reg1,
87 Register reg2 = no_reg,
88 Register reg3 = no_reg,
89 Register reg4 = no_reg,
90 Register reg5 = no_reg
[all...] |
| /hardware/intel/common/libmix/mix_vbp/viddec_fw/fw/codecs/h264/parser/ |
| h264parse_math.c | 4 unsigned long mult_u(register unsigned long var1, register unsigned long var2)
7 register unsigned long var_out = 0;
23 unsigned long ldiv_mod_u(register unsigned long a, register unsigned long b, unsigned long * mod)
25 register unsigned long div = b;
26 register unsigned long res = 0;
27 register unsigned long bit = 0x1;
62 unsigned ldiv_u(register unsigned a, register unsigned b)
[all...] |
| /external/v8/src/mips/ |
| macro-assembler-mips.h | 18 // Reserved Register Usage Summary.
25 // Per the MIPS ABI, register t9 must be used for indirect function call
27 // trying to update gp register for position-independent-code. Whenever
28 // MIPS generated code calls C code, it must be via t9 register.
80 Register GetRegisterThatIsNotOneOf(Register reg1,
81 Register reg2 = no_reg,
82 Register reg3 = no_reg,
83 Register reg4 = no_reg,
84 Register reg5 = no_reg
[all...] |
| /art/test/419-long-parameter/ |
| info.txt | 1 Regression test for the long parameter passed both in stack and register
3 register index does not necessarily match the stack index anymore.
|
| /external/v8/src/arm64/ |
| codegen-arm64.h | 18 // |result| as untagged output. Register index is asserted to be a 32-bit W
19 // register.
21 Register string,
22 Register index,
23 Register result,
38 Register temp1,
39 Register temp2,
40 Register temp3);
|
| /art/test/408-move-bug/ |
| info.txt | 1 Regression test for the register allocator in the optimizing
|
| /art/test/413-regalloc-regression/ |
| info.txt | 1 Regression test for the linear scan register allocator, that use to
|
| /art/test/456-baseline-array-set/ |
| info.txt | 2 of available registers when using the baseline register
|
| /art/test/467-regalloc-pair/ |
| info.txt | 1 Regression test for optimizing's register allocator
|
| /art/test/528-long-hint/ |
| info.txt | 2 allocating a wrong register pair.
|
| /external/chromium-trace/trace-viewer/third_party/Paste/ |
| setup.cfg | 7 distribute = register sdist bdist_egg upload pudge publish
|
| /external/v8/src/x64/ |
| macro-assembler-x64.h | 16 // Default scratch register used by MacroAssembler (and other code that needs
17 // a spare register). The register isn't callee save, and not used by the
19 const Register kScratchRegister = { 10 }; // r10.
20 const Register kSmiConstantRegister = { 12 }; // r12 (callee save).
21 const Register kRootRegister = { 13 }; // r13 (callee save).
24 // Actual value of root register is offset from the root array's start
55 bool AreAliased(Register reg1,
56 Register reg2,
57 Register reg3 = no_reg
[all...] |
