Lines Matching defs:first
2486 Location first = locations->InAt(0);
2492 first.AsRegister<Register>(),
2496 first.AsRegister<Register>(),
2504 first.AsRegisterPairLow<Register>(),
2507 first.AsRegisterPairHigh<Register>(),
2514 first.AsFpuRegister<SRegister>(),
2520 FromLowSToD(first.AsFpuRegisterPairLow<SRegister>()),
2561 Location first = locations->InAt(0);
2567 first.AsRegister<Register>(),
2571 first.AsRegister<Register>(),
2580 first.AsRegisterPairLow<Register>(),
2583 first.AsRegisterPairHigh<Register>(),
2590 first.AsFpuRegister<SRegister>(),
2597 FromLowSToD(first.AsFpuRegisterPairLow<SRegister>()),
2636 Location first = locations->InAt(0);
2641 first.AsRegister<Register>(),
2648 Register in1_hi = first.AsRegisterPairHigh<Register>();
2649 Register in1_lo = first.AsRegisterPairLow<Register>();
2678 first.AsFpuRegister<SRegister>(),
2685 FromLowSToD(first.AsFpuRegisterPairLow<SRegister>()),
2884 Location first = locations->InAt(0);
2893 first.AsRegister<Register>(),
2897 DCHECK_EQ(calling_convention.GetRegisterAt(0), first.AsRegister<Register>());
2909 DCHECK_EQ(calling_convention.GetRegisterAt(0), first.AsRegisterPairLow<Register>());
2910 DCHECK_EQ(calling_convention.GetRegisterAt(1), first.AsRegisterPairHigh<Register>());
2923 first.AsFpuRegister<SRegister>(),
2930 FromLowSToD(first.AsFpuRegisterPairLow<SRegister>()),
3022 Location first = locations->InAt(0);
3031 Register reg1 = first.AsRegister<Register>();
3041 DCHECK_EQ(calling_convention.GetRegisterAt(0), first.AsRegister<Register>());
3150 // rotates by swapping input regs (effectively rotating by the first 32-bits of
3305 Location first = locations->InAt(0);
3312 Register first_reg = first.AsRegister<Register>();
3343 Register high = first.AsRegisterPairHigh<Register>();
3344 Register low = first.AsRegisterPairLow<Register>();
3793 // - the first register should be even but not R14.
3953 // - the first register should be even but not R14.
5035 DRegister first = FromLowSToD(source.AsFpuRegisterPairLow<SRegister>());
5037 __ vmovd(DTMP, first);
5038 __ vmovd(first, second);
5491 // convention), which might be cluttered by the potential first
5705 // might be cluttered by the potential first read barrier
5783 Location first = locations->InAt(0);
5788 Register first_reg = first.AsRegister<Register>();
5809 Register first_low = first.AsRegisterPairLow<Register>();
5810 Register first_high = first.AsRegisterPairHigh<Register>();
5834 void InstructionCodeGeneratorARM::GenerateAndConst(Register out, Register first, uint32_t value) {
5837 if (out != first) {
5838 __ mov(out, ShifterOperand(first));
5848 __ and_(out, first, so);
5851 __ bic(out, first, ShifterOperand(~value));
5855 void InstructionCodeGeneratorARM::GenerateOrrConst(Register out, Register first, uint32_t value) {
5858 if (out != first) {
5859 __ mov(out, ShifterOperand(first));
5869 __ orr(out, first, so);
5872 __ orn(out, first, ShifterOperand(~value));
5876 void InstructionCodeGeneratorARM::GenerateEorConst(Register out, Register first, uint32_t value) {
5879 if (out != first) {
5880 __ mov(out, ShifterOperand(first));
5884 __ eor(out, first, ShifterOperand(value));
5889 Location first = locations->InAt(0);
5897 Register first_reg = first.AsRegister<Register>();
5910 Register first_low = first.AsRegisterPairLow<Register>();
5911 Register first_high = first.AsRegisterPairHigh<Register>();
5930 Register first_reg = first.AsRegister<Register>();
5943 Register first_low = first.AsRegisterPairLow<Register>();
5944 Register first_high = first.AsRegisterPairHigh<Register>();
6421 // guaranteed that the receiver is the first register of the calling convention.
6491 const MethodReference& target_method = entry.first;
6500 const MethodReference& target_method = entry.first;
6535 const StringReference& target_string = entry.first;
