Lines Matching defs:first
2097 // byte if the carry flag (CF) is set to 1 after the first NEGL
2754 Location first = locations->InAt(0);
2761 if (out.AsRegister<Register>() == first.AsRegister<Register>()) {
2764 __ addl(out.AsRegister<Register>(), first.AsRegister<Register>());
2767 first.AsRegister<Register>(), second.AsRegister<Register>(), TIMES_1, 0));
2771 if (out.AsRegister<Register>() == first.AsRegister<Register>()) {
2774 __ leal(out.AsRegister<Register>(), Address(first.AsRegister<Register>(), value));
2777 DCHECK(first.Equals(locations->Out()));
2778 __ addl(first.AsRegister<Register>(), Address(ESP, second.GetStackIndex()));
2785 __ addl(first.AsRegisterPairLow<Register>(), second.AsRegisterPairLow<Register>());
2786 __ adcl(first.AsRegisterPairHigh<Register>(), second.AsRegisterPairHigh<Register>());
2788 __ addl(first.AsRegisterPairLow<Register>(), Address(ESP, second.GetStackIndex()));
2789 __ adcl(first.AsRegisterPairHigh<Register>(),
2794 __ addl(first.AsRegisterPairLow<Register>(), Immediate(Low32Bits(value)));
2795 __ adcl(first.AsRegisterPairHigh<Register>(), Immediate(High32Bits(value)));
2802 __ addss(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>());
2806 __ addss(first.AsFpuRegister<XmmRegister>(),
2812 __ addss(first.AsFpuRegister<XmmRegister>(), Address(ESP, second.GetStackIndex()));
2819 __ addsd(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>());
2823 __ addsd(first.AsFpuRegister<XmmRegister>(),
2829 __ addsd(first.AsFpuRegister<XmmRegister>(), Address(ESP, second.GetStackIndex()));
2871 Location first = locations->InAt(0);
2873 DCHECK(first.Equals(locations->Out()));
2877 __ subl(first.AsRegister<Register>(), second.AsRegister<Register>());
2879 __ subl(first.AsRegister<Register>(),
2882 __ subl(first.AsRegister<Register>(), Address(ESP, second.GetStackIndex()));
2889 __ subl(first.AsRegisterPairLow<Register>(), second.AsRegisterPairLow<Register>());
2890 __ sbbl(first.AsRegisterPairHigh<Register>(), second.AsRegisterPairHigh<Register>());
2892 __ subl(first.AsRegisterPairLow<Register>(), Address(ESP, second.GetStackIndex()));
2893 __ sbbl(first.AsRegisterPairHigh<Register>(),
2898 __ subl(first.AsRegisterPairLow<Register>(), Immediate(Low32Bits(value)));
2899 __ sbbl(first.AsRegisterPairHigh<Register>(), Immediate(High32Bits(value)));
2906 __ subss(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>());
2910 __ subss(first.AsFpuRegister<XmmRegister>(),
2916 __ subss(first.AsFpuRegister<XmmRegister>(), Address(ESP, second.GetStackIndex()));
2923 __ subsd(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>());
2927 __ subsd(first.AsFpuRegister<XmmRegister>(),
2933 __ subsd(first.AsFpuRegister<XmmRegister>(), Address(ESP, second.GetStackIndex()));
2987 Location first = locations->InAt(0);
2994 // problems where the output may not be the same as the first operand.
2997 __ imull(out.AsRegister<Register>(), first.AsRegister<Register>(), imm);
2999 DCHECK(first.Equals(out));
3000 __ imull(first.AsRegister<Register>(), second.AsRegister<Register>());
3003 DCHECK(first.Equals(out));
3004 __ imull(first.AsRegister<Register>(), Address(ESP, second.GetStackIndex()));
3009 Register in1_hi = first.AsRegisterPairHigh<Register>();
3010 Register in1_lo = first.AsRegisterPairLow<Register>();
3091 DCHECK(first.Equals(locations->Out()));
3093 __ mulss(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>());
3097 __ mulss(first.AsFpuRegister<XmmRegister>(),
3103 __ mulss(first.AsFpuRegister<XmmRegister>(), Address(ESP, second.GetStackIndex()));
3109 DCHECK(first.Equals(locations->Out()));
3111 __ mulsd(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>());
3115 __ mulsd(first.AsFpuRegister<XmmRegister>(),
3121 __ mulsd(first.AsFpuRegister<XmmRegister>(), Address(ESP, second.GetStackIndex()));
3177 Location first = locations->InAt(0);
3188 PushOntoFPStack(first, 0, 2 * elem_size, /* is_fp */ true, is_wide);
3359 Location first = locations->InAt(0);
3365 DCHECK_EQ(EAX, first.AsRegister<Register>());
3405 DCHECK_EQ(calling_convention.GetRegisterAt(0), first.AsRegisterPairLow<Register>());
3406 DCHECK_EQ(calling_convention.GetRegisterAt(1), first.AsRegisterPairHigh<Register>());
3485 Location first = locations->InAt(0);
3497 __ divss(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>());
3501 __ divss(first.AsFpuRegister<XmmRegister>(),
3507 __ divss(first.AsFpuRegister<XmmRegister>(), Address(ESP, second.GetStackIndex()));
3514 __ divsd(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>());
3518 __ divsd(first.AsFpuRegister<XmmRegister>(),
3524 __ divsd(first.AsFpuRegister<XmmRegister>(), Address(ESP, second.GetStackIndex()));
3697 Location first = locations->InAt(0);
3699 DCHECK(first.Equals(locations->Out()));
3703 DCHECK(first.IsRegister());
3704 Register first_reg = first.AsRegister<Register>();
3736 GenerateShlLong(first, second_reg);
3738 GenerateShrLong(first, second_reg);
3740 GenerateUShrLong(first, second_reg);
3748 GenerateShlLong(first, shift);
3750 GenerateShrLong(first, shift);
3752 GenerateUShrLong(first, shift);
3892 Location first = locations->InAt(0);
3896 first.AsRegister<Register>();
3908 Register first_reg_lo = first.AsRegisterPairLow<Register>();
3909 Register first_reg_hi = first.AsRegisterPairHigh<Register>();
4415 // guaranteed that the receiver is the first register of the calling convention.
4558 // So we use an XMM register as a temp to achieve atomicity (first
6303 // convention), which might be cluttered by the potential first
6538 // might be cluttered by the potential first read barrier
6603 Location first = locations->InAt(0);
6605 DCHECK(first.Equals(locations->Out()));
6610 __ andl(first.AsRegister<Register>(), second.AsRegister<Register>());
6612 __ orl(first.AsRegister<Register>(), second.AsRegister<Register>());
6615 __ xorl(first.AsRegister<Register>(), second.AsRegister<Register>());
6619 __ andl(first.AsRegister<Register>(),
6622 __ orl(first.AsRegister<Register>(),
6626 __ xorl(first.AsRegister<Register>(),
6631 __ andl(first.AsRegister<Register>(), Address(ESP, second.GetStackIndex()));
6633 __ orl(first.AsRegister<Register>(), Address(ESP, second.GetStackIndex()));
6636 __ xorl(first.AsRegister<Register>(), Address(ESP, second.GetStackIndex()));
6643 __ andl(first.AsRegisterPairLow<Register>(), second.AsRegisterPairLow<Register>());
6644 __ andl(first.AsRegisterPairHigh<Register>(), second.AsRegisterPairHigh<Register>());
6646 __ orl(first.AsRegisterPairLow<Register>(), second.AsRegisterPairLow<Register>());
6647 __ orl(first.AsRegisterPairHigh<Register>(), second.AsRegisterPairHigh<Register>());
6650 __ xorl(first.AsRegisterPairLow<Register>(), second.AsRegisterPairLow<Register>());
6651 __ xorl(first.AsRegisterPairHigh<Register>(), second.AsRegisterPairHigh<Register>());
6655 __ andl(first.AsRegisterPairLow<Register>(), Address(ESP, second.GetStackIndex()));
6656 __ andl(first.AsRegisterPairHigh<Register>(),
6659 __ orl(first.AsRegisterPairLow<Register>(), Address(ESP, second.GetStackIndex()));
6660 __ orl(first.AsRegisterPairHigh<Register>(),
6664 __ xorl(first.AsRegisterPairLow<Register>(), Address(ESP, second.GetStackIndex()));
6665 __ xorl(first.AsRegisterPairHigh<Register>(),
6675 Register first_low = first.AsRegisterPairLow<Register>();
6676 Register first_high = first.AsRegisterPairHigh<Register>();
7018 // Handle the first compare/branch as a special case because it might
