Lines Matching full:address
515 // __ movl(out, Address(out, offset));
774 Address::Absolute(invoke->GetStringInitOffset(), /* no_rip */ true));
789 Address::Absolute(kDummy32BitOffset, /* no_rip */ false));
805 __ movq(reg, Address(CpuRegister(RSP), kCurrentMethodStackOffset));
809 Address(CpuRegister(method_reg),
814 __ movq(reg, Address(reg, CodeGenerator::GetCachePointerOffset(index_in_cache)));
837 __ call(Address(callee_method.AsRegister<CpuRegister>(),
860 __ movl(temp, Address(CpuRegister(receiver), class_offset));
871 __ movq(temp, Address(temp, method_offset));
873 __ call(Address(temp, ArtMethod::EntryPointFromQuickCompiledCodeOffset(
950 __ movq(Address(CpuRegister(RSP), stack_index), CpuRegister(reg_id));
955 __ movq(CpuRegister(reg_id), Address(CpuRegister(RSP), stack_index));
960 __ movsd(Address(CpuRegister(RSP), stack_index), XmmRegister(reg_id));
965 __ movsd(XmmRegister(reg_id), Address(CpuRegister(RSP), stack_index));
984 __ gs()->call(Address::Absolute(entry_point_offset, /* no_rip */ true));
989 // Use a fake return address register to mimic Quick.
1045 __ cfi().SetCurrentCFAOffset(kX86_64WordSize); // return address
1052 __ testq(CpuRegister(RAX), Address(
1079 __ movsd(Address(CpuRegister(RSP), offset), XmmRegister(kFpuCalleeSaves[i]));
1084 __ movq(Address(CpuRegister(RSP), kCurrentMethodStackOffset),
1096 __ movsd(XmmRegister(kFpuCalleeSaves[i]), Address(CpuRegister(RSP), offset));
1134 __ movl(dest, Address(CpuRegister(RSP), source.GetStackIndex()));
1144 __ movq(dest, Address(CpuRegister(RSP), source.GetStackIndex()));
1161 __ movss(dest, Address(CpuRegister(RSP), source.GetStackIndex()));
1164 __ movsd(dest, Address(CpuRegister(RSP), source.GetStackIndex()));
1168 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()),
1171 __ movss(Address(CpuRegister(RSP), destination.GetStackIndex()),
1176 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), Immediate(value));
1179 __ movl(CpuRegister(TMP), Address(CpuRegister(RSP), source.GetStackIndex()));
1180 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), CpuRegister(TMP));
1185 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex()),
1188 __ movsd(Address(CpuRegister(RSP), destination.GetStackIndex()),
1202 __ movq(CpuRegister(TMP), Address(CpuRegister(RSP), source.GetStackIndex()));
1203 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex()), CpuRegister(TMP));
1306 __ cmpl(left_reg, Address(CpuRegister(RSP), right.GetStackIndex()));
1318 __ cmpq(left_reg, Address(CpuRegister(RSP), right.GetStackIndex()));
1334 Address(CpuRegister(RSP), right.GetStackIndex()));
1348 Address(CpuRegister(RSP), right.GetStackIndex()));
1453 __ cmpl(Address(CpuRegister(RSP), lhs.GetStackIndex()), Immediate(0));
1483 Address(CpuRegister(RSP), rhs.GetStackIndex()));
1616 Address(CpuRegister(RSP), value_true_loc.GetStackIndex()), is_64_bit);
1689 __ cmpl(lhs.AsRegister<CpuRegister>(), Address(CpuRegister(RSP), rhs.GetStackIndex()));
1703 __ cmpq(lhs.AsRegister<CpuRegister>(), Address(CpuRegister(RSP), rhs.GetStackIndex()));
1713 __ ucomiss(lhs_reg, Address(CpuRegister(RSP), rhs.GetStackIndex()));
1726 __ ucomisd(lhs_reg, Address(CpuRegister(RSP), rhs.GetStackIndex()));
1877 __ cmpl(left_reg, Address(CpuRegister(RSP), right.GetStackIndex()));
1889 __ cmpq(left_reg, Address(CpuRegister(RSP), right.GetStackIndex()));
1901 __ ucomiss(left_reg, Address(CpuRegister(RSP), right.GetStackIndex()));
1915 __ ucomisd(left_reg, Address(CpuRegister(RSP), right.GetStackIndex()));
2234 __ movl(temp, Address(CpuRegister(RSP), receiver.GetStackIndex()));
2236 __ movl(temp, Address(temp, class_offset));
2239 __ movl(temp, Address(receiver.AsRegister<CpuRegister>(), class_offset));
2251 __ movq(temp, Address(temp, method_offset));
2253 __ call(Address(temp,
2546 Address(CpuRegister(RSP), in.GetStackIndex()));
2573 Address(CpuRegister(RSP), in.GetStackIndex()));
2594 Address(CpuRegister(RSP), in.GetStackIndex()));
2731 Address(CpuRegister(RSP), in.GetStackIndex()));
2761 Address(CpuRegister(RSP), in.GetStackIndex()), false);
2775 Address(CpuRegister(RSP), in.GetStackIndex()), true);
2789 Address(CpuRegister(RSP), in.GetStackIndex()));
2816 Address(CpuRegister(RSP), in.GetStackIndex()), false);
2830 Address(CpuRegister(RSP), in.GetStackIndex()), true);
2844 Address(CpuRegister(RSP), in.GetStackIndex()));
2906 __ leal(out.AsRegister<CpuRegister>(), Address(
2914 __ leal(out.AsRegister<CpuRegister>(), Address(
2919 __ addl(first.AsRegister<CpuRegister>(), Address(CpuRegister(RSP), second.GetStackIndex()));
2931 __ leaq(out.AsRegister<CpuRegister>(), Address(
2942 __ leaq(out.AsRegister<CpuRegister>(), Address(
2959 Address(CpuRegister(RSP), second.GetStackIndex()));
2974 Address(CpuRegister(RSP), second.GetStackIndex()));
3025 __ subl(first.AsRegister<CpuRegister>(), Address(CpuRegister(RSP), second.GetStackIndex()));
3050 Address(CpuRegister(RSP), second.GetStackIndex()));
3065 Address(CpuRegister(RSP), second.GetStackIndex()));
3134 Address(CpuRegister(RSP), second.GetStackIndex()));
3157 Address(CpuRegister(RSP), second.GetStackIndex()));
3173 Address(CpuRegister(RSP), second.GetStackIndex()));
3189 Address(CpuRegister(RSP), second.GetStackIndex()));
3203 __ flds(Address(CpuRegister(RSP), source.GetStackIndex() + stack_adjustment));
3206 __ fldl(Address(CpuRegister(RSP), source.GetStackIndex() + stack_adjustment));
3212 __ flds(Address(CpuRegister(RSP), temp_offset));
3216 __ fldl(Address(CpuRegister(RSP), temp_offset));
3254 __ fsts(Address(CpuRegister(RSP), 0));
3256 __ fstl(Address(CpuRegister(RSP), 0));
3265 __ movss(out.AsFpuRegister<XmmRegister>(), Address(CpuRegister(RSP), 0));
3267 __ movsd(out.AsFpuRegister<XmmRegister>(), Address(CpuRegister(RSP), 0));
3331 __ leal(tmp, Address(numerator, abs_imm - 1));
3596 Address(CpuRegister(RSP), second.GetStackIndex()));
3611 Address(CpuRegister(RSP), second.GetStackIndex()));
3703 __ cmpl(Address(CpuRegister(RSP), value.GetStackIndex()), Immediate(0));
3718 __ cmpq(Address(CpuRegister(RSP), value.GetStackIndex()), Immediate(0));
3904 __ gs()->movq(temp, Address::Absolute(QUICK_ENTRY_POINT(pNewEmptyString), /* no_rip */ true));
3905 __ call(Address(temp, code_offset.SizeValue()));
3988 Address(locations->InAt(0).AsRegister<CpuRegister>(), method_offset));
4109 __ movzxb(out.AsRegister<CpuRegister>(), Address(base, offset));
4114 __ movsxb(out.AsRegister<CpuRegister>(), Address(base, offset));
4119 __ movsxw(out.AsRegister<CpuRegister>(), Address(base, offset));
4124 __ movzxw(out.AsRegister<CpuRegister>(), Address(base, offset));
4129 __ movl(out.AsRegister<CpuRegister>(), Address(base, offset));
4145 __ movl(out.AsRegister<CpuRegister>(), Address(base, offset));
4159 __ movq(out.AsRegister<CpuRegister>(), Address(base, offset));
4164 __ movss(out.AsFpuRegister<XmmRegister>(), Address(base, offset));
4169 __ movsd(out.AsFpuRegister<XmmRegister>(), Address(base, offset));
4255 __ movb(Address(base, offset), Immediate(v));
4257 __ movb(Address(base, offset), value.AsRegister<CpuRegister>());
4266 __ movw(Address(base, offset), Immediate(v));
4268 __ movw(Address(base, offset), value.AsRegister<CpuRegister>());
4281 __ movl(Address(base, offset), Immediate(v));
4287 __ movl(Address(base, offset), temp);
4289 __ movl(Address(base, offset), value.AsRegister<CpuRegister>());
4298 codegen_->MoveInt64ToAddress(Address(base, offset),
4299 Address(base, offset + sizeof(int32_t)),
4304 __ movq(Address(base, offset), value.AsRegister<CpuRegister>());
4313 __ movl(Address(base, offset), Immediate(v));
4315 __ movss(Address(base, offset), value.AsFpuRegister<XmmRegister>());
4324 codegen_->MoveInt64ToAddress(Address(base, offset),
4325 Address(base, offset + sizeof(int32_t)),
4330 __ movsd(Address(base, offset), value.AsFpuRegister<XmmRegister>());
4476 __ testl(CpuRegister(RAX), Address(obj.AsRegister<CpuRegister>(), 0));
4490 __ cmpl(Address(CpuRegister(RSP), obj.GetStackIndex()), Immediate(0));
4544 __ movzxb(out, Address(obj,
4547 __ movzxb(out, Address(obj, index.AsRegister<CpuRegister>(), TIMES_1, data_offset));
4556 __ movsxb(out, Address(obj,
4559 __ movsxb(out, Address(obj, index.AsRegister<CpuRegister>(), TIMES_1, data_offset));
4568 __ movsxw(out, Address(obj,
4571 __ movsxw(out, Address(obj, index.AsRegister<CpuRegister>(), TIMES_2, data_offset));
4580 __ movzxw(out, Address(obj,
4583 __ movzxw(out, Address(obj, index.AsRegister<CpuRegister>(), TIMES_2, data_offset));
4592 __ movl(out, Address(obj,
4595 __ movl(out, Address(obj, index.AsRegister<CpuRegister>(), TIMES_4, data_offset));
4618 __ movl(out, Address(obj, offset));
4625 __ movl(out, Address(obj, index.AsRegister<CpuRegister>(), TIMES_4, data_offset));
4641 __ movq(out, Address(obj,
4644 __ movq(out, Address(obj, index.AsRegister<CpuRegister>(), TIMES_8, data_offset));
4653 __ movss(out, Address(obj,
4656 __ movss(out, Address(obj, index.AsRegister<CpuRegister>(), TIMES_4, data_offset));
4665 __ movsd(out, Address(obj,
4668 __ movsd(out, Address(obj, index.AsRegister<CpuRegister>(), TIMES_8, data_offset));
4737 Address address = index.IsConstant()
4738 ? Address(array, (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_1) + offset)
4739 : Address(array, index.AsRegister<CpuRegister>(), TIMES_1, offset);
4741 __ movb(address, value.AsRegister<CpuRegister>());
4743 __ movb(address, Immediate(value.GetConstant()->AsIntConstant()->GetValue()));
4752 Address address = index.IsConstant()
4753 ? Address(array, (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_2) + offset)
4754 : Address(array, index.AsRegister<CpuRegister>(), TIMES_2, offset);
4756 __ movw(address, value.AsRegister<CpuRegister>());
4759 __ movw(address, Immediate(value.GetConstant()->AsIntConstant()->GetValue()));
4767 Address address = index.IsConstant()
4768 ? Address(array, (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_4) + offset)
4769 : Address(array, index.AsRegister<CpuRegister>(), TIMES_4, offset);
4775 __ movl(address, Immediate(0));
4793 __ movl(address, Immediate(0));
4805 // __ movl(temp, Address(temp, component_offset));
4810 // __ movl(temp2, Address(register_value, class_offset));
4828 __ movl(temp, Address(array, class_offset));
4833 __ movl(temp, Address(temp, component_offset));
4837 __ cmpl(temp, Address(register_value, class_offset));
4846 __ movl(temp, Address(temp, super_offset));
4861 __ movl(address, temp);
4863 __ movl(address, register_value);
4883 Address address = index.IsConstant()
4884 ? Address(array, (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_4) + offset)
4885 : Address(array, index.AsRegister<CpuRegister>(), TIMES_4, offset);
4887 __ movl(address, value.AsRegister<CpuRegister>());
4891 __ movl(address, Immediate(v));
4899 Address address = index.IsConstant()
4900 ? Address(array, (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_8) + offset)
4901 : Address(array, index.AsRegister<CpuRegister>(), TIMES_8, offset);
4903 __ movq(address, value.AsRegister<CpuRegister>());
4907 Address address_high = index.IsConstant()
4908 ? Address(array, (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_8) +
4910 : Address(array, index.AsRegister<CpuRegister>(), TIMES_8, offset + sizeof(int32_t));
4911 codegen_->MoveInt64ToAddress(address, address_high, v, instruction);
4918 Address address = index.IsConstant()
4919 ? Address(array, (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_4) + offset)
4920 : Address(array, index.AsRegister<CpuRegister>(), TIMES_4, offset);
4922 __ movss(address, value.AsFpuRegister<XmmRegister>());
4927 __ movl(address, Immediate(v));
4935 Address address = index.IsConstant()
4936 ? Address(array, (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_8) + offset)
4937 : Address(array, index.AsRegister<CpuRegister>(), TIMES_8, offset);
4939 __ movsd(address, value.AsFpuRegister<XmmRegister>());
4944 Address address_high = index.IsConstant()
4945 ? Address(array, (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_8) +
4947 : Address(array, index.AsRegister<CpuRegister>(), TIMES_8, offset + sizeof(int32_t));
4948 codegen_->MoveInt64ToAddress(address, address_high, v, instruction);
4971 __ movl(out, Address(obj, offset));
5037 __ gs()->movq(card, Address::Absolute(Thread::CardTableOffset<kX86_64WordSize>().Int32Value(),
5041 __ movb(Address(temp, card, TIMES_1, 0), card);
5089 __ gs()->cmpw(Address::Absolute(Thread::ThreadFlagsOffset<kX86_64WordSize>().Int32Value(),
5114 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()),
5118 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex()),
5124 Address(CpuRegister(RSP), source.GetStackIndex()));
5127 Address(CpuRegister(RSP), source.GetStackIndex()));
5130 __ movl(CpuRegister(TMP), Address(CpuRegister(RSP), source.GetStackIndex()));
5131 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), CpuRegister(TMP));
5136 Address(CpuRegister(RSP), source.GetStackIndex()));
5139 Address(CpuRegister(RSP), source.GetStackIndex()));
5142 __ movq(CpuRegister(TMP), Address(CpuRegister(RSP), source.GetStackIndex()));
5143 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex()), CpuRegister(TMP));
5157 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), Immediate(value));
5175 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), imm);
5193 __ movss(Address(CpuRegister(RSP), destination.GetStackIndex()),
5197 __ movsd(Address(CpuRegister(RSP), destination.GetStackIndex()),
5204 __ movl(CpuRegister(TMP), Address(CpuRegister(RSP), mem));
5205 __ movl(Address(CpuRegister(RSP), mem), reg);
5214 __ movl(CpuRegister(TMP), Address(CpuRegister(RSP), mem1 + stack_offset));
5216 Address(CpuRegister(RSP), mem2 + stack_offset));
5217 __ movl(Address(CpuRegister(RSP), mem2 + stack_offset), CpuRegister(TMP));
5218 __ movl(Address(CpuRegister(RSP), mem1 + stack_offset),
5229 __ movq(CpuRegister(TMP), Address(CpuRegister(RSP), mem));
5230 __ movq(Address(CpuRegister(RSP), mem), reg);
5239 __ movq(CpuRegister(TMP), Address(CpuRegister(RSP), mem1 + stack_offset));
5241 Address(CpuRegister(RSP), mem2 + stack_offset));
5242 __ movq(Address(CpuRegister(RSP), mem2 + stack_offset), CpuRegister(TMP));
5243 __ movq(Address(CpuRegister(RSP), mem1 + stack_offset),
5248 __ movl(CpuRegister(TMP), Address(CpuRegister(RSP), mem));
5249 __ movss(Address(CpuRegister(RSP), mem), reg);
5254 __ movq(CpuRegister(TMP), Address(CpuRegister(RSP), mem));
5255 __ movsd(Address(CpuRegister(RSP), mem), reg);
5307 __ cmpl(Address(class_reg, mirror::Class::StatusOffset().Int32Value()),
5344 cls, out_loc, Address(current_method, ArtMethod::DeclaringClassOffset().Int32Value()));
5348 __ movq(out, Address(current_method,
5352 cls, out_loc, Address(out, CodeGenerator::GetCacheOffset(cls->GetTypeIndex())));
5406 // We prefer the always-available RIP-relative address for the x86-64 boot image.
5444 __ leal(out, Address::Absolute(CodeGeneratorX86_64::kDummy32BitOffset, /* no_rip */ false));
5451 uint32_t address = dchecked_integral_cast<uint32_t>(load->GetAddress());
5452 __ movl(out, Immediate(address)); // Zero-extended.
5459 Address address = Address::Absolute(load->GetAddress(), /* no_rip */ true);
5460 GenerateGcRootFieldLoad(load, out_loc, address);
5462 // TODO: Consider using opcode A1, i.e. movl eax, moff32 (with 64-bit address).
5464 GenerateGcRootFieldLoad(load, out_loc, Address(out, 0));
5471 Address address = Address::Absolute(CodeGeneratorX86_64::kDummy32BitOffset,
5473 GenerateGcRootFieldLoad(load, out_loc, address, fixup_label);
5481 load, out_loc, Address(current_method, ArtMethod::DeclaringClassOffset().Int32Value()));
5483 __ movq(out, Address(out, mirror::Class::DexCacheStringsOffset().Uint32Value()));
5486 load, out_loc, Address(out, CodeGenerator::GetCacheOffset(load->GetStringIndex())));
5503 static Address GetExceptionTlsAddress() {
5504 return Address::Absolute(Thread::ExceptionOffset<kX86_64WordSize>().Int32Value(),
5613 __ cmpl(out, Address(CpuRegister(RSP), cls.GetStackIndex()));
5642 __ cmpl(out, Address(CpuRegister(RSP), cls.GetStackIndex()));
5660 __ cmpl(out, Address(CpuRegister(RSP), cls.GetStackIndex()));
5684 __ cmpl(out, Address(CpuRegister(RSP), cls.GetStackIndex()));
5693 __ cmpw(Address(out, primitive_offset), Immediate(Primitive::kPrimNot));
5706 __ cmpl(out, Address(CpuRegister(RSP), cls.GetStackIndex()));
5842 __ cmpl(temp, Address(CpuRegister(RSP), cls.GetStackIndex()));
5890 __ cmpl(temp, Address(CpuRegister(RSP), cls.GetStackIndex()));
5916 __ cmpl(temp, Address(CpuRegister(RSP), cls.GetStackIndex()));
5962 __ cmpl(temp, Address(CpuRegister(RSP), cls.GetStackIndex()));
5987 __ cmpw(Address(temp, primitive_offset), Immediate(Primitive::kPrimNot));
6109 Address address(CpuRegister(RSP), second.GetStackIndex());
6111 __ andl(first.AsRegister<CpuRegister>(), address);
6113 __ orl(first.AsRegister<CpuRegister>(), address);
6116 __ xorl(first.AsRegister<CpuRegister>(), address);
6138 __ andq(first_reg, Address(CpuRegister(RSP), second.GetStackIndex()));
6150 __ orq(first_reg, Address(CpuRegister(RSP), second.GetStackIndex()));
6163 __ xorq(first_reg, Address(CpuRegister(RSP), second.GetStackIndex()));
6190 __ movl(out_reg, Address(out_reg, offset));
6196 __ movl(out_reg, Address(out_reg, offset));
6218 __ movl(out_reg, Address(obj_reg, offset));
6224 __ movl(out_reg, Address(obj_reg, offset));
6231 const Address& address,
6239 // root = *address;
6244 // /* GcRoot<mirror::Object> */ root = *address
6245 __ movl(root_reg, address);
6262 __ gs()->cmpl(Address::Absolute(Thread::IsGcMarkingOffset<kX86_64WordSize>().Int32Value(),
6270 // /* GcRoot<mirror::Object>* */ root = address
6271 __ leaq(root_reg, address);
6280 // /* GcRoot<mirror::Object> */ root = *address
6281 __ movl(root_reg, address);
6300 Address src(obj, offset);
6316 Address src = index.IsConstant() ?
6317 Address(obj, (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_4) + data_offset) :
6318 Address(obj, index.AsRegister<CpuRegister>(), TIMES_4, data_offset);
6325 const Address& src,
6360 __ movl(temp_reg, Address(obj, monitor_offset));
6536 __ leal(temp_reg, Address(value_reg_in, -lower_bound));
6546 // Load the address of the jump table in the constant area.
6550 __ movsxd(temp_reg, Address(base_reg, value_reg, TIMES_4, 0));
6552 // Add the offset to the address of the table base.
6628 __ movq(Address(CpuRegister(RSP), dest.GetStackIndex()),
6632 __ movq(Address(CpuRegister(RSP), dest.GetStackIndex()), CpuRegister(TMP));
6651 // Patch the correct offset for the instruction. We use the address of the
6722 Address CodeGeneratorX86_64::LiteralDoubleAddress(double v) {
6724 return Address::RIP(fixup);
6727 Address CodeGeneratorX86_64::LiteralFloatAddress(float v) {
6729 return Address::RIP(fixup);
6732 Address CodeGeneratorX86_64::LiteralInt32Address(int32_t v) {
6734 return Address::RIP(fixup);
6737 Address CodeGeneratorX86_64::LiteralInt64Address(int64_t v) {
6739 return Address::RIP(fixup);
6762 Address CodeGeneratorX86_64::LiteralCaseTable(HPackedSwitch* switch_instr) {
6763 // Create a fixup to be used to create and address the jump table.
6769 return Address::RIP(table_fixup);
6772 void CodeGeneratorX86_64::MoveInt64ToAddress(const Address& addr_low,
6773 const Address& addr_high,
