Lines Matching full:address
270 void Arm32Assembler::ldr(Register rd, const Address& ad, Condition cond) {
275 void Arm32Assembler::str(Register rd, const Address& ad, Condition cond) {
280 void Arm32Assembler::ldrb(Register rd, const Address& ad, Condition cond) {
285 void Arm32Assembler::strb(Register rd, const Address& ad, Condition cond) {
290 void Arm32Assembler::ldrh(Register rd, const Address& ad, Condition cond) {
295 void Arm32Assembler::strh(Register rd, const Address& ad, Condition cond) {
300 void Arm32Assembler::ldrsb(Register rd, const Address& ad, Condition cond) {
305 void Arm32Assembler::ldrsh(Register rd, const Address& ad, Condition cond) {
310 void Arm32Assembler::ldrd(Register rd, const Address& ad, Condition cond) {
316 void Arm32Assembler::strd(Register rd, const Address& ad, Condition cond) {
606 const Address& ad) {
609 const Address& addr = static_cast<const Address&>(ad);
644 const Address& ad) {
647 const Address& addr = static_cast<const Address&>(ad);
1035 void Arm32Assembler::vldrs(SRegister sd, const Address& ad, Condition cond) {
1036 const Address& addr = static_cast<const Address&>(ad);
1048 void Arm32Assembler::vstrs(SRegister sd, const Address& ad, Condition cond) {
1049 const Address& addr = static_cast<const Address&>(ad);
1062 void Arm32Assembler::vldrd(DRegister dd, const Address& ad, Condition cond) {
1063 const Address& addr = static_cast<const Address&>(ad);
1075 void Arm32Assembler::vstrd(DRegister dd, const Address& ad, Condition cond) {
1076 const Address& addr = static_cast<const Address&>(ad);
1303 str(rd, Address(SP, -kRegisterSize, Address::PreIndex), cond);
1308 ldr(rd, Address(SP, kRegisterSize, Address::PostIndex), cond);
1466 // Address::CanHoldLoadOffsetArm.
1472 if (!Address::CanHoldLoadOffsetArm(type, offset)) {
1479 CHECK(Address::CanHoldLoadOffsetArm(type, offset));
1482 ldrsb(reg, Address(base, offset), cond);
1485 ldrb(reg, Address(base, offset), cond);
1488 ldrsh(reg, Address(base, offset), cond);
1491 ldrh(reg, Address(base, offset), cond);
1494 ldr(reg, Address(base, offset), cond);
1497 ldrd(reg, Address(base, offset), cond);
1507 // Address::CanHoldLoadOffsetArm, as expected by JIT::GuardedLoadFromOffset.
1512 if (!Address::CanHoldLoadOffsetArm(kLoadSWord, offset)) {
1519 CHECK(Address::CanHoldLoadOffsetArm(kLoadSWord, offset));
1520 vldrs(reg, Address(base, offset), cond);
1525 // Address::CanHoldLoadOffsetArm, as expected by JIT::GuardedLoadFromOffset.
1530 if (!Address::CanHoldLoadOffsetArm(kLoadDWord, offset)) {
1537 CHECK(Address::CanHoldLoadOffsetArm(kLoadDWord, offset));
1538 vldrd(reg, Address(base, offset), cond);
1543 // Address::CanHoldStoreOffsetArm.
1549 if (!Address::CanHoldStoreOffsetArm(type, offset)) {
1557 CHECK(Address::CanHoldStoreOffsetArm(type, offset));
1560 strb(reg, Address(base, offset), cond);
1563 strh(reg, Address(base, offset), cond);
1566 str(reg, Address(base, offset), cond);
1569 strd(reg, Address(base, offset), cond);
1579 // Address::CanHoldStoreOffsetArm, as expected by JIT::GuardedStoreToOffset.
1584 if (!Address::CanHoldStoreOffsetArm(kStoreSWord, offset)) {
1591 CHECK(Address::CanHoldStoreOffsetArm(kStoreSWord, offset));
1592 vstrs(reg, Address(base, offset), cond);
1597 // Address::CanHoldStoreOffsetArm, as expected by JIT::GuardedStoreSToOffset.
1602 if (!Address::CanHoldStoreOffsetArm(kStoreDWord, offset)) {
1609 CHECK(Address::CanHoldStoreOffsetArm(kStoreDWord, offset));
1610 vstrd(reg, Address(base, offset), cond);