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Lines Matching refs:TargetInfo

10 // This file implements construction of a TargetInfo object from a
15 #include "clang/Basic/TargetInfo.h"
409 this->WIntType = TargetInfo::UnsignedInt;
565 this->IntMaxType = TargetInfo::SignedLongLong;
566 this->Int64Type = TargetInfo::SignedLongLong;
567 this->SizeType = TargetInfo::UnsignedInt;
715 this->IntMaxType = TargetInfo::SignedLongLong;
716 this->Int64Type = TargetInfo::SignedLongLong;
722 this->SizeType = TargetInfo::UnsignedInt;
723 this->PtrDiffType = TargetInfo::SignedInt;
724 this->IntPtrType = TargetInfo::SignedInt;
774 class PPCTargetInfo : public TargetInfo {
777 static const TargetInfo::GCCRegAlias GCCRegAliases[];
795 : TargetInfo(Triple), HasVSX(false), HasP8Vector(false),
909 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
911 TargetInfo::ConstraintInfo &Info) const override {
1019 return TargetInfo::convertConstraint(Constraint);
1333 return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
1400 const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
1470 ArrayRef<TargetInfo::GCCRegAlias> PPCTargetInfo::getGCCRegAliases() const {
1502 return TargetInfo::PowerABIBuiltinVaList;
1507 // TargetInfo for little endian.
1540 return TargetInfo::CharPtrBuiltinVaList;
1565 return TargetInfo::CharPtrBuiltinVaList;
1591 class NVPTXTargetInfo : public TargetInfo {
1606 NVPTXTargetInfo(const llvm::Triple &Triple) : TargetInfo(Triple) {
1656 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
1661 TargetInfo::ConstraintInfo &Info) const override {
1681 return TargetInfo::CharPtrBuiltinVaList;
1715 SizeType = TargetInfo::UnsignedInt;
1716 PtrDiffType = TargetInfo::SignedInt;
1717 IntPtrType = TargetInfo::SignedInt;
1726 SizeType = TargetInfo::UnsignedLong;
1727 PtrDiffType = TargetInfo::SignedLong;
1728 IntPtrType = TargetInfo::SignedLong;
1759 class AMDGPUTargetInfo : public TargetInfo {
1785 : TargetInfo(Triple) {
1824 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
1829 TargetInfo::ConstraintInfo &Info) const override {
1866 return TargetInfo::CharPtrBuiltinVaList;
2035 const TargetInfo::AddlRegName AddlRegNames[] = {
2056 class X86TargetInfo : public TargetInfo {
2343 X86TargetInfo(const llvm::Triple &Triple) : TargetInfo(Triple) {
2358 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
2361 ArrayRef<TargetInfo::AddlRegName> getGCCAddlRegNames() const override {
2366 TargetInfo::ConstraintInfo &info) const override;
2736 if (!TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec))
3475 TargetInfo::ConstraintInfo &Info) const {
3643 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) |
3644 (1 << TargetInfo::Double) |
3645 (1 << TargetInfo::LongDouble));
3653 return TargetInfo::CharPtrBuiltinVaList;
3973 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
3986 return TargetInfo::X86_64ABIBuiltinVaList;
4049 return TargetInfo::CharPtrBuiltinVaList;
4177 class ARMTargetInfo : public TargetInfo {
4197 static const TargetInfo::GCCRegAlias GCCRegAliases[];
4449 : TargetInfo(Triple), FPMath(FP_Default),
4565 return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
4886 : (getTriple().isWatchOS() ? TargetInfo::CharPtrBuiltinVaList
4887 : TargetInfo::VoidPtrBuiltinVaList);
4890 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
4892 TargetInfo::ConstraintInfo &Info) const override {
5029 const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
5050 ArrayRef<TargetInfo::GCCRegAlias> ARMTargetInfo::getGCCRegAliases() const {
5123 return TargetInfo::CharPtrBuiltinVaList;
5243 class AArch64TargetInfo : public TargetInfo {
5245 static const TargetInfo::GCCRegAlias GCCRegAliases[];
5265 : TargetInfo(Triple), ABI("aapcs") {
5431 return TargetInfo::AArch64ABIBuiltinVaList;
5435 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
5438 TargetInfo::ConstraintInfo &Info) const override {
5549 const TargetInfo::GCCRegAlias AArch64TargetInfo::GCCRegAliases[] = {
5558 ArrayRef<TargetInfo::GCCRegAlias> AArch64TargetInfo::getGCCRegAliases() const {
5639 return TargetInfo::CharPtrBuiltinVaList;
5644 class HexagonTargetInfo : public TargetInfo {
5647 static const TargetInfo::GCCRegAlias GCCRegAliases[];
5652 HexagonTargetInfo(const llvm::Triple &Triple) : TargetInfo(Triple) {
5678 TargetInfo::ConstraintInfo &Info) const override {
5703 return TargetInfo::CharPtrBuiltinVaList;
5706 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
5781 return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
5798 const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = {
5804 ArrayRef<TargetInfo::GCCRegAlias> HexagonTargetInfo::getGCCRegAliases() const {
5818 class SparcTargetInfo : public TargetInfo {
5819 static const TargetInfo::GCCRegAlias GCCRegAliases[];
5824 : TargetInfo(Triple), SoftFloat(false) {}
5858 return TargetInfo::VoidPtrBuiltinVaList;
5861 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
5863 TargetInfo::ConstraintInfo &info) const override {
5968 const TargetInfo::GCCRegAlias SparcTargetInfo::GCCRegAliases[] = {
6003 ArrayRef<TargetInfo::GCCRegAlias> SparcTargetInfo::getGCCRegAliases() const {
6101 class SystemZTargetInfo : public TargetInfo {
6110 : TargetInfo(Triple), CPU("z10"), HasTransactionalExecution(false),
6143 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
6148 TargetInfo::ConstraintInfo &info) const override;
6154 return TargetInfo::SystemZBuiltinVaList;
6177 return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
6236 TargetInfo::ConstraintInfo &Info) const {
6263 class MSP430TargetInfo : public TargetInfo {
6267 MSP430TargetInfo(const llvm::Triple &Triple) : TargetInfo(Triple) {
6299 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
6304 TargetInfo::ConstraintInfo &info) const override {
6321 return TargetInfo::CharPtrBuiltinVaList;
6352 class TCETargetInfo : public TargetInfo {
6354 TCETargetInfo(const llvm::Triple &Triple) : TargetInfo(Triple) {
6393 return TargetInfo::VoidPtrBuiltinVaList;
6397 TargetInfo::ConstraintInfo &info) const override {
6400 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
6405 class BPFTargetInfo : public TargetInfo {
6407 BPFTargetInfo(const llvm::Triple &Triple) : TargetInfo(Triple) {
6440 return TargetInfo::VoidPtrBuiltinVaList;
6446 TargetInfo::ConstraintInfo &info) const override {
6449 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
6454 class MipsTargetInfoBase : public TargetInfo {
6478 : TargetInfo(Triple), CPU(CPUStr), IsMips16(false), IsMicromips(false),
6530 return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
6603 return TargetInfo::VoidPtrBuiltinVaList;
6632 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override = 0;
6634 TargetInfo::ConstraintInfo &Info) const override {
6680 return TargetInfo::convertConstraint(Constraint);
6811 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
6812 static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
6965 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
6966 static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
7046 class PNaClTargetInfo : public TargetInfo {
7048 PNaClTargetInfo(const llvm::Triple &Triple) : TargetInfo(Triple) {
7055 this->IntMaxType = TargetInfo::SignedLongLong;
7056 this->Int64Type = TargetInfo::SignedLongLong;
7060 this->SizeType = TargetInfo::UnsignedInt;
7061 this->PtrDiffType = TargetInfo::SignedInt;
7062 this->IntPtrType = TargetInfo::SignedInt;
7079 return TargetInfo::PNaClABIBuiltinVaList;
7082 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
7084 TargetInfo::ConstraintInfo &Info) const override {
7097 ArrayRef<TargetInfo::GCCRegAlias> PNaClTargetInfo::getGCCRegAliases() const {
7109 return TargetInfo::PNaClABIBuiltinVaList;
7113 class Le64TargetInfo : public TargetInfo {
7117 Le64TargetInfo(const llvm::Triple &Triple) : TargetInfo(Triple) {
7136 return TargetInfo::PNaClABIBuiltinVaList;
7142 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
7146 TargetInfo::ConstraintInfo &Info) const override {
7153 class WebAssemblyTargetInfo : public TargetInfo {
7163 : TargetInfo(T), SIMDLevel(NoSIMD) {
7190 return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
7232 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const final {
7237 TargetInfo::ConstraintInfo &Info) const final {
7247 : TargetInfo::getIntTypeByWidth(BitWidth, IsSigned);
7254 : TargetInfo::getLeastIntTypeByWidth(BitWidth, IsSigned);
7315 class SPIRTargetInfo : public TargetInfo {
7317 SPIRTargetInfo(const llvm::Triple &Triple) : TargetInfo(Triple) {
7343 TargetInfo::ConstraintInfo &info) const override {
7346 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
7350 return TargetInfo::VoidPtrBuiltinVaList;
7367 SizeType = TargetInfo::UnsignedInt;
7368 PtrDiffType = IntPtrType = TargetInfo::SignedInt;
7382 SizeType = TargetInfo::UnsignedLong;
7383 PtrDiffType = IntPtrType = TargetInfo::SignedLong;
7393 class XCoreTargetInfo : public TargetInfo {
7396 XCoreTargetInfo(const llvm::Triple &Triple) : TargetInfo(Triple) {
7420 return TargetInfo::VoidPtrBuiltinVaList;
7432 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
7436 TargetInfo::ConstraintInfo &Info) const override {
7482 static TargetInfo *AllocateTarget(const llvm::Triple &Triple) {
7903 TargetInfo *
7904 TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags,
7909 std::unique_ptr<TargetInfo> Target(AllocateTarget(Triple));