Lines Matching refs:__v4si
38 return (__mmask8)__builtin_ia32_pcmpeqd128_mask((__v4si)__a, (__v4si)__b,
44 return (__mmask8)__builtin_ia32_pcmpeqd128_mask((__v4si)__a, (__v4si)__b,
50 return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 0,
56 return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 0,
135 return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 5,
141 return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 5,
147 return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 5,
153 return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 5,
231 return (__mmask8)__builtin_ia32_pcmpgtd128_mask((__v4si)__a, (__v4si)__b,
237 return (__mmask8)__builtin_ia32_pcmpgtd128_mask((__v4si)__a, (__v4si)__b,
243 return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 6,
249 return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 6,
327 return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 2,
333 return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 2,
339 return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 2,
345 return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 2,
423 return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 1,
429 return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 1,
435 return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 1,
441 return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 1,
519 return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 4,
525 return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 4,
531 return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 4,
537 return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 4,
697 return (__m128i) __builtin_ia32_paddd128_mask ((__v4si) __A,
698 (__v4si) __B,
699 (__v4si) __W,
706 return (__m128i) __builtin_ia32_paddd128_mask ((__v4si) __A,
707 (__v4si) __B,
708 (__v4si)
737 return (__m128i) __builtin_ia32_psubd128_mask ((__v4si) __A,
738 (__v4si) __B,
739 (__v4si) __W,
746 return (__m128i) __builtin_ia32_psubd128_mask ((__v4si) __A,
747 (__v4si) __B,
748 (__v4si)
796 return (__m128i) __builtin_ia32_pmuldq128_mask ((__v4si) __X,
797 (__v4si) __Y,
804 return (__m128i) __builtin_ia32_pmuldq128_mask ((__v4si) __X,
805 (__v4si) __Y,
834 return (__m128i) __builtin_ia32_pmuludq128_mask ((__v4si) __X,
835 (__v4si) __Y,
842 return (__m128i) __builtin_ia32_pmuludq128_mask ((__v4si) __X,
843 (__v4si) __Y,
871 return (__m128i) __builtin_ia32_pmulld128_mask ((__v4si) __A,
872 (__v4si) __B,
873 (__v4si)
882 return (__m128i) __builtin_ia32_pmulld128_mask ((__v4si) __A,
883 (__v4si) __B,
884 (__v4si) __W, __M);
910 return (__m128i) __builtin_ia32_pandd128_mask ((__v4si) __A,
911 (__v4si) __B,
912 (__v4si) __W,
919 return (__m128i) __builtin_ia32_pandd128_mask ((__v4si) __A,
920 (__v4si) __B,
921 (__v4si)
950 return (__m128i) __builtin_ia32_pandnd128_mask ((__v4si) __A,
951 (__v4si) __B,
952 (__v4si) __W,
959 return (__m128i) __builtin_ia32_pandnd128_mask ((__v4si) __A,
960 (__v4si) __B,
961 (__v4si)
989 return (__m128i) __builtin_ia32_pord128_mask ((__v4si) __A,
990 (__v4si) __B,
991 (__v4si) __W,
998 return (__m128i) __builtin_ia32_pord128_mask ((__v4si) __A,
999 (__v4si) __B,
1000 (__v4si)
1029 return (__m128i) __builtin_ia32_pxord128_mask ((__v4si) __A,
1030 (__v4si) __B,
1031 (__v4si) __W,
1038 return (__m128i) __builtin_ia32_pxord128_mask ((__v4si) __A,
1039 (__v4si) __B,
1040 (__v4si)
1201 (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)(__m128i)(a), \
1202 (__v4si)(__m128i)(b), \
1206 (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)(__m128i)(a), \
1207 (__v4si)(__m128i)(b), \
1211 (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)(__m128i)(a), \
1212 (__v4si)(__m128i)(b), \
1216 (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)(__m128i)(a), \
1217 (__v4si)(__m128i)(b), \
2047 return (__m128i) __builtin_ia32_blendmd_128_mask ((__v4si) __A,
2048 (__v4si) __W,
2193 return (__m128i) __builtin_ia32_compresssi128_mask ((__v4si) __A,
2194 (__v4si) __W,
2200 return (__m128i) __builtin_ia32_compresssi128_mask ((__v4si) __A,
2201 (__v4si)
2265 __builtin_ia32_compressstoresi128_mask ((__v4si *) __P,
2266 (__v4si) __A,
2279 return (__m128d) __builtin_ia32_cvtdq2pd128_mask ((__v4si) __A,
2286 return (__m128d) __builtin_ia32_cvtdq2pd128_mask ((__v4si) __A,
2294 return (__m256d) __builtin_ia32_cvtdq2pd256_mask ((__v4si) __A,
2301 return (__m256d) __builtin_ia32_cvtdq2pd256_mask ((__v4si) __A,
2309 return (__m128) __builtin_ia32_cvtdq2ps128_mask ((__v4si) __A,
2316 return (__m128) __builtin_ia32_cvtdq2ps128_mask ((__v4si) __A,
2340 (__v4si) __W,
2347 (__v4si)
2355 (__v4si) __W,
2362 (__v4si)
2400 (__v4si)
2408 (__v4si) __W,
2415 (__v4si)
2423 (__v4si)
2431 (__v4si) __W,
2438 (__v4si)
2446 (__v4si) __W,
2453 (__v4si)
2506 (__v4si)
2514 (__v4si) __W,
2521 (__v4si)
2552 (__v4si) __W,
2559 (__v4si)
2567 (__v4si) __W,
2574 (__v4si)
2582 (__v4si)
2590 (__v4si) __W,
2597 (__v4si)
2605 (__v4si)
2613 (__v4si) __W,
2620 (__v4si)
2628 (__v4si) __W,
2635 (__v4si)
2658 (__v4si)
2666 (__v4si) __W,
2673 (__v4si)
2703 return (__m128d) __builtin_ia32_cvtudq2pd128_mask ((__v4si) __A,
2711 return (__m128d) __builtin_ia32_cvtudq2pd128_mask ((__v4si) __A,
2718 return (__m128d) __builtin_ia32_cvtudq2pd128_mask ((__v4si) __A,
2726 return (__m256d) __builtin_ia32_cvtudq2pd256_mask ((__v4si) __A,
2734 return (__m256d) __builtin_ia32_cvtudq2pd256_mask ((__v4si) __A,
2741 return (__m256d) __builtin_ia32_cvtudq2pd256_mask ((__v4si) __A,
2749 return (__m128) __builtin_ia32_cvtudq2ps128_mask ((__v4si) __A,
2757 return (__m128) __builtin_ia32_cvtudq2ps128_mask ((__v4si) __A,
2764 return (__m128) __builtin_ia32_cvtudq2ps128_mask ((__v4si) __A,
3025 return (__m128i) __builtin_ia32_expandloadsi128_mask ((__v4si *) __P,
3026 (__v4si) __W,
3033 return (__m128i) __builtin_ia32_expandloadsi128_mask ((__v4si *) __P,
3034 (__v4si)
3089 return (__m128i) __builtin_ia32_expandsi128_mask ((__v4si) __A,
3090 (__v4si) __W,
3096 return (__m128i) __builtin_ia32_expandsi128_mask ((__v4si) __A,
3097 (__v4si)
3418 return (__m128i) __builtin_ia32_pabsd128_mask ((__v4si) __A,
3419 (__v4si) __W,
3425 return (__m128i) __builtin_ia32_pabsd128_mask ((__v4si) __A,
3426 (__v4si)
3494 return (__m128i) __builtin_ia32_pmaxsd128_mask ((__v4si) __A,
3495 (__v4si) __B,
3496 (__v4si)
3504 return (__m128i) __builtin_ia32_pmaxsd128_mask ((__v4si) __A,
3505 (__v4si) __B,
3506 (__v4si) __W, __M);
3580 return (__m128i) __builtin_ia32_pmaxud128_mask ((__v4si) __A,
3581 (__v4si) __B,
3582 (__v4si)
3590 return (__m128i) __builtin_ia32_pmaxud128_mask ((__v4si) __A,
3591 (__v4si) __B,
3592 (__v4si) __W, __M);
3666 return (__m128i) __builtin_ia32_pminsd128_mask ((__v4si) __A,
3667 (__v4si) __B,
3668 (__v4si)
3676 return (__m128i) __builtin_ia32_pminsd128_mask ((__v4si) __A,
3677 (__v4si) __B,
3678 (__v4si) __W, __M);
3752 return (__m128i) __builtin_ia32_pminud128_mask ((__v4si) __A,
3753 (__v4si) __B,
3754 (__v4si)
3762 return (__m128i) __builtin_ia32_pminud128_mask ((__v4si) __A,
3763 (__v4si) __B,
3764 (__v4si) __W, __M);
4048 (__v2di) __index, (__v4si) __v1, __scale); })
4053 (__v4si) __v1, __scale); })
4066 (__v4di) __index, (__v4si) __v1, __scale); })
4071 (__v4si) __v1, __scale); })
4076 (__v4si) __index, (__v2df) __v1, __scale); })
4080 __builtin_ia32_scattersiv2df (__addr, __mask, (__v4si) __index,\
4085 (__v4si) __index, (__v2di) __v1, __scale); })
4089 __builtin_ia32_scattersiv2di (__addr, __mask, (__v4si) __index, \
4094 (__v4si) __index, (__v4df) __v1, __scale); })
4098 __builtin_ia32_scattersiv4df (__addr, __mask, (__v4si) __index, \
4104 (__v4si) __index, (__v4di) __v1, __scale); })
4108 __builtin_ia32_scattersiv4di (__addr, __mask, (__v4si) __index, \
4113 (__v4si) __index, (__v4sf) __v1, __scale); })
4117 __builtin_ia32_scattersiv4sf (__addr, __mask, (__v4si) __index, \
4122 (__v4si) __index, (__v4si) __v1, __scale); })
4126 __builtin_ia32_scattersiv4si (__addr, __mask, (__v4si) __index,\
4127 (__v4si) __v1, __scale); })
4279 return (__m128i) __builtin_ia32_vpermi2vard128_mask ((__v4si) __A,
4280 (__v4si) __I
4282 (__v4si) __B,
4322 (__v4si) __I
4360 return (__m128i) __builtin_ia32_vpermt2vard128_mask ((__v4si) __I
4362 (__v4si) __A,
4363 (__v4si) __B,
4370 return (__m128i) __builtin_ia32_vpermt2vard128_mask ((__v4si) __I
4372 (__v4si) __A,
4373 (__v4si) __B,
4380 return (__m128i) __builtin_ia32_vpermt2vard128_maskz ((__v4si) __I
4382 (__v4si) __A,
4383 (__v4si) __B,
4484 return (__m128) __builtin_ia32_vpermt2varps128_mask ((__v4si) __I
4494 return (__m128) __builtin_ia32_vpermt2varps128_mask ((__v4si) __I
4504 return (__m128) __builtin_ia32_vpermt2varps128_maskz ((__v4si) __I
