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Lines Matching refs:Parent

459 #define ABSTRACT_TYPELOC(CLASS, PARENT)
460 #define TYPELOC(CLASS, PARENT) \
2380   Abbrev->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::VBR, 6)); // Parent
2470     if (Mod->Parent) {
2471       assert(SubmoduleIDs[Mod->Parent] && "Submodule parent not written?");
2472       ParentID = SubmoduleIDs[Mod->Parent];