Lines Matching refs:Node
44 unsigned InstrEmitter::CountResults(SDNode *Node) {
45 unsigned N = Node->getNumValues();
46 while (N && Node->getValueType(N - 1) == MVT::Glue)
48 if (N && Node->getValueType(N - 1) == MVT::Other)
60 static unsigned countOperands(SDNode *Node, unsigned NumExpUses,
62 unsigned N = Node->getNumOperands();
63 while (N && Node->getOperand(N - 1).getValueType() == MVT::Glue)
65 if (N && Node->getOperand(N - 1).getValueType() == MVT::Other)
71 if (isa<RegisterMaskSDNode>(Node->getOperand(I - 1)))
73 if (RegisterSDNode *RN = dyn_cast<RegisterSDNode>(Node->getOperand(I - 1)))
83 /// EmitCopyFromReg - Generate machine code for an CopyFromReg node or an
86 EmitCopyFromReg(SDNode *Node, unsigned ResNo, bool IsClone, bool IsCloned,
91 SDValue Op(Node, ResNo);
96 assert(isNew && "Node emitted out of order - early");
100 // If the node is only used by a CopyToReg and the dest reg is a vreg, use
104 MVT VT = Node->getSimpleValueType(ResNo);
111 for (SDNode *User : Node->uses()) {
114 User->getOperand(2).getNode() == Node &&
125 if (Op.getNode() != Node || Op.getResNo() != ResNo)
127 MVT VT = Node->getSimpleValueType(Op.getResNo());
176 BuildMI(*MBB, InsertPos, Node->getDebugLoc(), TII->get(TargetOpcode::COPY),
180 SDValue Op(Node, ResNo);
185 assert(isNew && "Node emitted out of order - early");
189 /// node is a CopyToReg, return its destination register. Return 0 otherwise.
190 unsigned InstrEmitter::getDstOfOnlyCopyToRegUse(SDNode *Node,
192 if (!Node->hasOneUse())
195 SDNode *User = *Node->use_begin();
197 User->getOperand(2).getNode() == Node &&
206 void InstrEmitter::CreateVirtualRegisters(SDNode *Node,
211 assert(Node->getMachineOpcode() != TargetOpcode::IMPLICIT_DEF &&
214 unsigned NumResults = CountResults(Node);
216 // If the specific node value is only used by a CopyToReg and the dest reg
226 if (i < NumResults && TLI->isTypeLegal(Node->getSimpleValueType(i))) {
228 TLI->getRegClassFor(Node->getSimpleValueType(i));
237 unsigned NumResults = CountResults(Node);
238 VRBase = cast<RegisterSDNode>(Node->getOperand(i-NumResults))->getReg();
244 for (SDNode *User : Node->uses()) {
246 User->getOperand(2).getNode() == Node &&
260 // Create the result registers for this node and add the result regs to
271 SDValue Op(Node, i);
276 assert(isNew && "Node emitted out of order - early");
282 /// of the specified node.
302 assert(I != VRBaseMap.end() && "Node emitted out of order - late");
371 /// specifies the instruction information for the node, and IIOpNum is the
468 void InstrEmitter::EmitSubregNode(SDNode *Node,
472 unsigned Opc = Node->getMachineOpcode();
474 // If the node is only used by a CopyToReg and the dest reg is a vreg, use
476 for (SDNode *User : Node->uses()) {
478 User->getOperand(2).getNode() == Node) {
491 unsigned SubIdx = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue();
493 TLI->getRegClassFor(Node->getSimpleValueType(0));
495 unsigned VReg = getVR(Node->getOperand(0), VRBaseMap);
508 BuildMI(*MBB, InsertPos, Node->getDebugLoc(),
516 Node->getOperand(0).getSimpleValueType(),
517 Node->getDebugLoc());
524 BuildMI(*MBB, InsertPos, Node->getDebugLoc(),
529 SDValue N0 = Node->getOperand(0);
530 SDValue N1 = Node->getOperand(1);
531 SDValue N2 = Node->getOperand(2);
548 const TargetRegisterClass *SRC = TLI->getRegClassFor(Node->getSimpleValueType(0));
557 BuildMI(*MF, Node->getDebugLoc(), TII->get(Opc), VRBase);
573 llvm_unreachable("Node is not insert_subreg, extract_subreg, or subreg_to_reg");
575 SDValue Op(Node, 0);
578 assert(isNew && "Node emitted out of order - early");
586 InstrEmitter::EmitCopyToRegClassNode(SDNode *Node,
588 unsigned VReg = getVR(Node->getOperand(0), VRBaseMap);
591 unsigned DstRCIdx = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue();
595 BuildMI(*MBB, InsertPos, Node->getDebugLoc(), TII->get(TargetOpcode::COPY),
598 SDValue Op(Node, 0);
601 assert(isNew && "Node emitted out of order - early");
606 void InstrEmitter::EmitRegSequence(SDNode *Node,
609 unsigned DstRCIdx = cast<ConstantSDNode>(Node->getOperand(0))->getZExtValue();
613 MachineInstrBuilder MIB = BuildMI(*MF, Node->getDebugLoc(), II, NewVReg);
614 unsigned NumOps = Node->getNumOperands();
618 SDValue Op = Node->getOperand(i);
620 RegisterSDNode *R = dyn_cast<RegisterSDNode>(Node->getOperand(i-1));
625 unsigned SubReg = getVR(Node->getOperand(i-1), VRBaseMap);
640 SDValue Op(Node, 0);
643 assert(isNew && "Node emitted out of order - early");
646 /// EmitDbgValue - Generate machine instruction for a dbg_value node.
671 SDNode *Node = SD->getSDNode();
672 SDValue Op = SDValue(Node, SD->getResNo());
717 /// EmitMachineNode - Generate machine code for a target-specific node and
721 EmitMachineNode(SDNode *Node, bool IsClone, bool IsCloned,
723 unsigned Opc = Node->getMachineOpcode();
729 EmitSubregNode(Node, VRBaseMap, IsClone, IsCloned);
735 EmitCopyToRegClassNode(Node, VRBaseMap);
741 EmitRegSequence(Node, VRBaseMap, IsClone, IsCloned);
750 unsigned NumResults = CountResults(Node);
761 CC = Node->getConstantOperandVal(PatchPointOpers::CCPos);
769 countOperands(Node, II.getNumOperands() - NumDefs, NumImpUses);
775 "Too few operands for a variadic node!");
780 "#operands for dag node doesn't match .td file!");
784 MachineInstrBuilder MIB = BuildMI(*MF, Node->getDebugLoc(), II);
789 CreateVirtualRegisters(Node, MIB, II, IsClone, IsCloned, VRBaseMap);
798 AddOperand(MIB, Node->getOperand(i), i-NumSkip+NumDefs, &II,
808 MIB.setMemRefs(cast<MachineSDNode>(Node)->memoperands_begin(),
809 cast<MachineSDNode>(Node)->memoperands_end());
819 // 1. When there is a use of a Node value beyond the explicitly defined
837 if (!Node->hasAnyUseOfValue(i))
841 EmitCopyFromReg(Node, i, IsClone, IsCloned, Reg, VRBaseMap);
846 if (Node->getValueType(Node->getNumValues()-1) == MVT::Glue) {
847 for (SDNode *F = Node->getGluedUser(); F; F = F->getGluedUser()) {
876 TLI->AdjustInstrPostInstrSelection(MIB, Node);
879 /// EmitSpecialNode - Generate machine code for a target-independent node and
882 EmitSpecialNode(SDNode *Node, bool IsClone, bool IsCloned,
884 switch (Node->getOpcode()) {
887 Node->dump();
889 llvm_unreachable("This target-independent node should have been selected!");
897 SDValue SrcVal = Node->getOperand(2);
903 unsigned DestReg = cast<RegisterSDNode>(Node->getOperand(1))->getReg();
907 BuildMI(*MBB, InsertPos, Node->getDebugLoc(), TII->get(TargetOpcode::COPY),
912 unsigned SrcReg = cast<RegisterSDNode>(Node->getOperand(1))->getReg();
913 EmitCopyFromReg(Node, 0, IsClone, IsCloned, SrcReg, VRBaseMap);
917 MCSymbol *S = cast<EHLabelSDNode>(Node)->getLabel();
918 BuildMI(*MBB, InsertPos, Node->getDebugLoc(),
925 unsigned TarOp = (Node->getOpcode() == ISD::LIFETIME_START) ?
928 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Node->getOperand(1));
929 BuildMI(*MBB, InsertPos, Node->getDebugLoc(), TII->get(TarOp))
935 unsigned NumOps = Node->getNumOperands();
936 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue)
940 MachineInstrBuilder MIB = BuildMI(*MF, Node->getDebugLoc(),
944 SDValue AsmStrV = Node->getOperand(InlineAsm::Op_AsmString);
951 cast<ConstantSDNode>(Node->getOperand(InlineAsm::Op_ExtraInfo))->
964 cast<ConstantSDNode>(Node->getOperand(i))->getZExtValue();
975 unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg();
986 unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg();
998 AddOperand(MIB, Node->getOperand(i), 0, nullptr, VRBaseMap,
1029 SDValue MDV = Node->getOperand(InlineAsm::Op_MDNode);
