Lines Matching full:address
145 Address = 0;
159 OS << format("0x%16.16" PRIx64 " %6u %6u", Address, Line, Column)
190 OS << "Address Line Column File ISA Discriminator Flags\n"
219 Sequence.LowPC = Row.Address;
226 Sequence.HighPC = Row.Address;
292 // address is that of the byte after the last target machine instruction
300 // Takes a single relocatable address as an operand. The size of the
301 // operand is the size appropriate to hold an address on the target
302 // machine. Set the address register to the value given by the
303 // relocatable address. All of the other statement program opcodes
304 // that affect the address register add a delta to it. This instruction
307 // If this address is in our relocation map, apply the relocation.
311 State.Row.Address =
314 State.Row.Address = debug_line_data.getAddress(offset_ptr);
372 // result to the address register of the state machine.
373 State.Row.Address +=
408 // Takes no arguments. Add to the address register of the state
409 // machine the address increment value corresponding to special
411 // when the statement program needs to advance the address by a
413 // a single byte. When it needs to advance the address by up to
416 // of two bytes. Only if it needs to advance the address by more
423 State.Row.Address += addr_offset;
428 // Takes a single uhalf operand. Add to the address register of
437 State.Row.Address += debug_line_data.getU16(offset_ptr);
474 // to be added to the line and address registers. The maximum line
479 // opcode must be used instead of a special opcode. The "address
480 // advance" is calculated by dividing the desired address increment
485 // (line_range * address advance) + opcode_base
492 // increment the address register is the result of the adjusted
496 // address increment = (adjusted opcode / line_range) *
510 State.Row.Address += addr_offset;
520 // Sort all sequences so that address lookup will work faster.
523 // Note: actually, instruction address ranges of sequences should not
524 // overlap (in shared objects and executables). If they do, the address
528 // rudimentary sequences for address ranges [0x0, 0xsomething).
536 uint64_t address) const {
537 if (!seq.containsPC(address))
539 // Search for instruction address in the rows describing the sequence.
543 row.Address = address;
552 if (row_pos->Address > address) {
561 uint32_t DWARFDebugLine::LineTable::lookupAddress(uint64_t address) const {
564 // First, find an instruction sequence containing the given address.
566 sequence.LowPC = address;
574 } else if (seq_pos->LowPC == address) {
581 return findRowInSeq(found_seq, address);
585 uint64_t address, uint64_t size, std::vector<uint32_t> &result) const {
588 uint64_t end_addr = address + size;
589 // First, find an instruction sequence containing the given address.
591 sequence.LowPC = address;
596 if (seq_pos == last_seq || seq_pos->LowPC != address) {
601 if (!seq_pos->containsPC(address))
615 first_row_index = findRowInSeq(cur_seq, address);
673 DWARFDebugLine::LineTable::getFileLineInfoForAddress(uint64_t Address,
678 uint32_t RowIndex = lookupAddress(Address);
