Home | History | Annotate | Download | only in ARM

Lines Matching refs:MBB

69     unsigned createDupLane(MachineBasicBlock &MBB,
75 unsigned createExtractSubreg(MachineBasicBlock &MBB,
81 unsigned createVExt(MachineBasicBlock &MBB,
86 unsigned createRegSequence(MachineBasicBlock &MBB,
91 unsigned createInsertSubreg(MachineBasicBlock &MBB,
96 unsigned createImplicitDef(MachineBasicBlock &MBB,
430 A15SDOptimizer::createDupLane(MachineBasicBlock &MBB,
436 AddDefaultPred(BuildMI(MBB,
449 A15SDOptimizer::createExtractSubreg(MachineBasicBlock &MBB,
455 BuildMI(MBB,
466 A15SDOptimizer::createRegSequence(MachineBasicBlock &MBB,
471 MBB,
485 A15SDOptimizer::createVExt(MachineBasicBlock &MBB,
490 AddDefaultPred(BuildMI(MBB,
501 A15SDOptimizer::createInsertSubreg(MachineBasicBlock &MBB,
506 BuildMI(MBB,
518 A15SDOptimizer::createImplicitDef(MachineBasicBlock &MBB,
522 BuildMI(MBB,
536 MachineBasicBlock &MBB = *MI->getParent();
544 unsigned DSub0 = createExtractSubreg(MBB, InsertPt, DL, Reg,
546 unsigned DSub1 = createExtractSubreg(MBB, InsertPt, DL, Reg,
549 unsigned Out1 = createDupLane(MBB, InsertPt, DL, DSub0, 0);
550 unsigned Out2 = createDupLane(MBB, InsertPt, DL, DSub0, 1);
551 Out = createVExt(MBB, InsertPt, DL, Out1, Out2);
553 unsigned Out3 = createDupLane(MBB, InsertPt, DL, DSub1, 0);
554 unsigned Out4 = createDupLane(MBB, InsertPt, DL, DSub1, 1);
555 Out2 = createVExt(MBB, InsertPt, DL, Out3, Out4);
557 Out = createRegSequence(MBB, InsertPt, DL, Out, Out2);
560 unsigned Out1 = createDupLane(MBB, InsertPt, DL, Reg, 0);
561 unsigned Out2 = createDupLane(MBB, InsertPt, DL, Reg, 1);
562 Out = createVExt(MBB, InsertPt, DL, Out1, Out2);
580 Out = createImplicitDef(MBB, InsertPt, DL);
581 Out = createInsertSubreg(MBB, InsertPt, DL, Out, PrefLane, Reg);
582 Out = createDupLane(MBB, InsertPt, DL, Out, Lane, UsesQPR);