Lines Matching defs:Reg0
301 unsigned Reg0 = TRI->getSubReg(RegBegin, ARM::gsub_0);
302 O << ARMInstPrinter::getRegisterName(Reg0) << ", ";
1295 // Add 's' bit operand (always reg0 for this)
1340 // Add 's' bit operand (always reg0 for this)
1349 // Add 's' bit operand (always reg0 for this)
1360 // Add 's' bit operand (always reg0 for this)
1401 // Add 's' bit operand (always reg0 for this)
1433 // Add 's' bit operand (always reg0 for this)
1478 // Add 's' bit operand (always reg0 for this)
1596 // Add 's' bit operand (always reg0 for this)
1635 // Add 's' bit operand (always reg0 for this)
1761 // 's' bit operand (always reg0 for this).
1778 // 's' bit operand (always reg0 for this).
1788 // 's' bit operand (always reg0 for this).
1798 // 's' bit operand (always reg0 for this).
