Lines Matching defs:Opcode
65 uint16_t MLxOpc; // MLA / MLS opcode
66 uint16_t MulOpc; // Expanded multiplication opcode
67 uint16_t AddSubOpc; // Expanded add / sub opcode
1337 // Change the opcode and operands.
1412 unsigned Opcode = Orig->getOpcode();
1413 switch (Opcode) {
1425 MachineInstrBuilder MIB = BuildMI(MBB, I, Orig->getDebugLoc(), get(Opcode),
1453 unsigned Opcode = MI0->getOpcode();
1454 if (Opcode == ARM::t2LDRpci ||
1455 Opcode == ARM::t2LDRpci_pic ||
1456 Opcode == ARM::tLDRpci ||
1457 Opcode == ARM::tLDRpci_pic ||
1458 Opcode == ARM::LDRLIT_ga_pcrel ||
1459 Opcode == ARM::LDRLIT_ga_pcrel_ldr ||
1460 Opcode == ARM::tLDRLIT_ga_pcrel ||
1461 Opcode == ARM::MOV_ga_pcrel ||
1462 Opcode == ARM::MOV_ga_pcrel_ldr ||
1463 Opcode == ARM::t2MOV_ga_pcrel) {
1464 if (MI1->getOpcode() != Opcode)
1474 if (Opcode == ARM::LDRLIT_ga_pcrel ||
1475 Opcode == ARM::LDRLIT_ga_pcrel_ldr ||
1476 Opcode == ARM::tLDRLIT_ga_pcrel ||
1477 Opcode == ARM::MOV_ga_pcrel ||
1478 Opcode == ARM::MOV_ga_pcrel_ldr ||
1479 Opcode == ARM::t2MOV_ga_pcrel)
1501 } else if (Opcode == ARM::PICLDR) {
1502 if (MI1->getOpcode() != Opcode)
1797 llvm_unreachable("Unknown unconditional branch opcode!");
2143 unsigned Opcode = MI.getOpcode();
2149 if (Opcode == ARM::INLINEASM)
2152 if (Opcode == ARM::ADDri) {
2240 // Attempt to fold address comp. if opcode has offset bits
2980 // the target to provide this information based on the instruction opcode and
3460 /// itinerary based on the def opcode and alignment. The caller will ensure that
3723 // Adjust for dynamic def-side opcode variants not captured by the itinerary.
3741 if (isZeroCost(DefMCID.Opcode))
4007 // Adjust for dynamic def-side opcode variants not captured by the itinerary.
4025 unsigned Opcode = Node->getMachineOpcode();
4026 switch (Opcode) {
4028 return ItinData->getStageLatency(get(Opcode).getSchedClass());
4114 ARMBaseInstrInfo::isFpMLxInstruction(unsigned Opcode, unsigned &MulOpc,
4117 DenseMap<unsigned, unsigned>::const_iterator I = MLxEntryMap.find(Opcode);
4248 llvm_unreachable("cannot handle opcode!");
4586 llvm_unreachable("Target dependent opcode missing");
4607 llvm_unreachable("Target dependent opcode missing");
4630 llvm_unreachable("Target dependent opcode missing");
