Lines Matching refs:Cnt
10090 static bool getVShiftImm(SDValue Op, unsigned ElementBits, int64_t &Cnt) {
10102 Cnt = SplatBits.getSExtValue();
10110 static bool isVShiftLImm(SDValue Op, EVT VT, bool isLong, int64_t &Cnt) {
10113 if (! getVShiftImm(Op, ElementBits, Cnt))
10115 return (Cnt >= 0 && (isLong ? Cnt-1 : Cnt) < ElementBits);
10125 int64_t &Cnt) {
10128 if (! getVShiftImm(Op, ElementBits, Cnt))
10131 return (Cnt >= 1 && Cnt <= (isNarrow ? ElementBits/2 : ElementBits));
10132 if (Cnt >= -(isNarrow ? ElementBits/2 : ElementBits) && Cnt <= -1) {
10133 Cnt = -Cnt;
10167 int64_t Cnt;
10173 if (isVShiftLImm(N->getOperand(2), VT, false, Cnt)) {
10177 if (isVShiftRImm(N->getOperand(2), VT, false, true, Cnt)) {
10186 if (isVShiftRImm(N->getOperand(2), VT, false, true, Cnt))
10192 if (isVShiftLImm(N->getOperand(2), VT, false, Cnt))
10197 if (isVShiftLImm(N->getOperand(2), VT, false, Cnt))
10209 if (isVShiftRImm(N->getOperand(2), VT, true, true, Cnt))
10251 N->getOperand(1), DAG.getConstant(Cnt, dl, MVT::i32));
10256 int64_t Cnt;
10259 if (isVShiftLImm(N->getOperand(3), VT, false, Cnt))
10261 else if (isVShiftRImm(N->getOperand(3), VT, false, true, Cnt))
10270 DAG.getConstant(Cnt, dl, MVT::i32));
10309 int64_t Cnt;
10315 if (isVShiftLImm(N->getOperand(1), VT, false, Cnt)) {
10318 DAG.getConstant(Cnt, dl, MVT::i32));
10324 if (isVShiftRImm(N->getOperand(1), VT, false, false, Cnt)) {
10329 DAG.getConstant(Cnt, dl, MVT::i32));
