Lines Matching refs:MBB
51 MachineBasicBlock *MBB = Tail->getParent();
52 ARMFunctionInfo *AFI = MBB->getParent()->getInfo<ARMFunctionInfo>();
72 MachineBasicBlock::iterator E = MBB->begin();
100 Thumb2InstrInfo::isLegalToSplitMBBAt(MachineBasicBlock &MBB,
104 if (MBBI == MBB.end())
112 void Thumb2InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
118 return ARMBaseInstrInfo::copyPhysReg(MBB, I, DL, DestReg, SrcReg, KillSrc);
120 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tMOVr), DestReg)
125 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
130 if (I != MBB.end()) DL = I->getDebugLoc();
132 MachineFunction &MF = *MBB.getParent();
141 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::t2STRi12))
154 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(ARM::t2STRDi8));
162 ARMBaseInstrInfo::storeRegToStackSlot(MBB, I, SrcReg, isKill, FI, RC, TRI);
166 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
170 MachineFunction &MF = *MBB.getParent();
176 if (I != MBB.end()) DL = I->getDebugLoc();
181 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::t2LDRi12), DestReg)
193 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(ARM::t2LDRDi8));
204 ARMBaseInstrInfo::loadRegFromStackSlot(MBB, I, DestReg, FI, RC, TRI);
216 void llvm::emitT2RegPlusImmediate(MachineBasicBlock &MBB,
222 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), DestReg)
239 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVi16), DestReg)
245 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVTi16), DestReg)
254 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2SUBrr), DestReg)
265 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2ADDrr), DestReg)
280 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr),DestReg)
292 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg)
331 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg)
