Lines Matching refs:MBB
62 static void emitThumb1LoadConstPool(MachineBasicBlock &MBB,
68 MachineFunction &MF = *MBB.getParent();
73 Type::getInt32Ty(MBB.getParent()->getFunction()->getContext()), Val);
76 BuildMI(MBB, MBBI, dl, TII.get(ARM::tLDRpci))
82 static void emitThumb2LoadConstPool(MachineBasicBlock &MBB,
88 MachineFunction &MF = *MBB.getParent();
92 Type::getInt32Ty(MBB.getParent()->getFunction()->getContext()), Val);
95 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2LDRpci))
104 MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl,
107 MachineFunction &MF = *MBB.getParent();
112 return emitThumb1LoadConstPool(MBB, MBBI, dl, DestReg, SubIdx, Val, Pred,
115 return emitThumb2LoadConstPool(MBB, MBBI, dl, DestReg, SubIdx, Val, Pred,
124 void emitThumbRegPlusImmInReg(MachineBasicBlock &MBB,
132 MachineFunction &MF = *MBB.getParent();
151 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVi8), LdReg))
154 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVi8), LdReg))
156 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tRSB), LdReg))
159 MRI.emitLoadConstPool(MBB, MBBI, dl, LdReg, 0, NumBytes,
166 BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg);
180 void llvm::emitThumbRegPlusImmediate(MachineBasicBlock &MBB,
295 emitThumbRegPlusImmInReg(MBB, MBBI, dl,
306 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(CopyOpc), DestReg);
323 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(ExtraOpc), DestReg);
357 MachineBasicBlock &MBB = *MI.getParent();
358 assert(MBB.getParent()->getSubtarget<ARMSubtarget>().isThumb1Only() &&
361 MachineInstrBuilder MIB(*MBB.getParent(), &MI);
370 emitThumbRegPlusImmediate(MBB, II, dl, DestReg, FrameReg, Offset, TII,
372 MBB.erase(II);
446 MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
450 const ARMSubtarget &STI = MBB.getParent()->getSubtarget<ARMSubtarget>();
452 return ARMBaseRegisterInfo::saveScavengerRegister(MBB, I, UseMI, RC, Reg);
461 AddDefaultPred(BuildMI(MBB, I, DL, TII.get(ARM::tMOVr))
491 AddDefaultPred(BuildMI(MBB, UseMI, DL, TII.get(ARM::tMOVr)).
501 MachineBasicBlock &MBB = *MI.getParent();
502 MachineFunction &MF = *MBB.getParent();
512 MachineInstrBuilder MIB(*MBB.getParent(), &MI);
576 emitThumbRegPlusImmInReg(MBB, II, dl, TmpReg, FrameReg,
579 emitLoadConstPool(MBB, II, dl, TmpReg, 0, Offset);
583 emitThumbRegPlusImmediate(MBB, II, dl, TmpReg, FrameReg, Offset, TII,
600 emitThumbRegPlusImmInReg(MBB, II, dl, VReg, FrameReg,
603 emitLoadConstPool(MBB, II, dl, VReg, 0, Offset);
607 emitThumbRegPlusImmediate(MBB, II, dl, VReg, FrameReg, Offset, TII,
