Lines Matching refs:MBB
287 /// Cond[1] = MBB
293 bool HexagonInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
303 MachineBasicBlock::instr_iterator I = MBB.instr_end();
304 if (I == MBB.instr_begin())
324 } while (I != MBB.instr_begin());
326 I = MBB.instr_end();
330 if (I == MBB.instr_begin())
339 MBB.isLayoutSuccessor(I->getOperand(0).getMBB())) {
342 I = MBB.instr_end();
343 if (I == MBB.instr_begin())
362 if (I == MBB.instr_begin())
406 DEBUG(dbgs() << "\nCant analyze BB#" << MBB.getNumber()
452 DEBUG(dbgs() << "\nCant analyze BB#" << MBB.getNumber()
459 unsigned HexagonInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
460 DEBUG(dbgs() << "\nRemoving branches out of BB#" << MBB.getNumber());
461 MachineBasicBlock::iterator I = MBB.end();
463 while (I != MBB.begin()) {
467 // Only removing branches from end of MBB.
472 MBB.erase(&MBB.back());
473 I = MBB.end();
480 unsigned HexagonInstrInfo::InsertBranch(MachineBasicBlock &MBB,
502 MachineInstr *Term = MBB.getFirstTerminator();
503 if (Term != MBB.end() && isPredicated(Term) &&
504 !AnalyzeBranch(MBB, NewTBB, NewFBB, Cond, false)) {
505 MachineBasicBlock *NextBB = &*++MBB.getIterator();
508 RemoveBranch(MBB);
509 return InsertBranch(MBB, TBB, nullptr, Cond, DL);
512 BuildMI(&MBB, DL, get(BOpc)).addMBB(TBB);
523 BuildMI(&MBB, DL, get(EndLoopOp)).addMBB(TBB);
530 DEBUG(dbgs() << "\nInserting NVJump for BB#" << MBB.getNumber(););
533 BuildMI(&MBB, DL, get(BccOpc)).addReg(Cond[1].getReg(), Flags1).
536 BuildMI(&MBB, DL, get(BccOpc)).addReg(Cond[1].getReg(), Flags1).
544 BuildMI(&MBB, DL, get(BccOpc)).addReg(RO.getReg(), Flags).addMBB(TBB);
563 BuildMI(&MBB, DL, get(EndLoopOp)).addMBB(TBB);
567 BuildMI(&MBB, DL, get(BccOpc)).addReg(RO.getReg(), Flags).addMBB(TBB);
569 BuildMI(&MBB, DL, get(BOpc)).addMBB(FBB);
575 bool HexagonInstrInfo::isProfitableToIfCvt(MachineBasicBlock &MBB,
578 return nonDbgBBSize(&MBB) <= 3;
590 bool HexagonInstrInfo::isProfitableToDupForIfCvt(MachineBasicBlock &MBB,
596 void HexagonInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
601 BuildMI(MBB, I, DL, get(Hexagon::A2_tfr), DestReg).addReg(SrcReg);
605 BuildMI(MBB, I, DL, get(Hexagon::A2_tfrp), DestReg).addReg(SrcReg);
610 BuildMI(MBB, I, DL, get(Hexagon::C2_or),
619 BuildMI(MBB, I, DL, get(Hexagon::A2_tfrsi), (RI.getSubReg(DestReg,
623 BuildMI(MBB, I, DL, get(Hexagon::A2_tfr), (RI.getSubReg(DestReg,
625 BuildMI(MBB, I, DL, get(Hexagon::A2_tfrsi), (RI.getSubReg(DestReg,
632 BuildMI(MBB, I, DL, get(Hexagon::A2_tfrrcr), DestReg).addReg(SrcReg);
637 BuildMI(MBB, I, DL, get(Hexagon::C2_tfrpr), DestReg).
643 BuildMI(MBB, I, DL, get(Hexagon::C2_tfrrp), DestReg).
649 BuildMI(MBB, I, DL, get(Hexagon::C2_tfrpr), DestReg).
654 BuildMI(MBB, I, DL, get(Hexagon::V6_vassign), DestReg).
659 BuildMI(MBB, I, DL, get(Hexagon::V6_vcombine), DestReg).
667 BuildMI(MBB, I, DL, get(Hexagon::V6_pred_and), DestReg).
683 BuildMI(MBB, I, DL, get(Hexagon::V6_pred_and),
687 BuildMI(MBB, I, DL, get(Hexagon::V6_pred_and),
696 dbgs() << "Invalid registers for copy in BB#" << MBB.getNumber()
704 void HexagonInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
707 DebugLoc DL = MBB.findDebugLoc(I);
708 MachineFunction &MF = *MBB.getParent();
717 BuildMI(MBB, I, DL, get(Hexagon::S2_storeri_io))
721 BuildMI(MBB, I, DL, get(Hexagon::S2_storerd_io))
725 BuildMI(MBB, I, DL, get(Hexagon::STriw_pred))
734 void HexagonInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
737 DebugLoc DL = MBB.findDebugLoc(I);
738 MachineFunction &MF = *MBB.getParent();
746 BuildMI(MBB, I, DL, get(Hexagon::L2_loadri_io), DestReg)
749 BuildMI(MBB, I, DL, get(Hexagon::L2_loadrd_io), DestReg)
752 BuildMI(MBB, I, DL, get(Hexagon::LDriw_pred), DestReg)
770 MachineBasicBlock &MBB = *MI->getParent();
778 BuildMI(MBB, MI, DL, get(Hexagon::A2_andir), MI->getOperand(0).getReg())
781 MBB.erase(MI);
788 copyPhysReg(MBB, MI, DL, DstReg, SrcReg, MI->getOperand(1).isKill());
789 MBB.erase(MI);
797 copyPhysReg(MBB, MI, DL, DstReg, SrcSubLo, MI->getOperand(1).isKill());
798 MBB.erase(MI);
807 copyPhysReg(MBB, MI, DL, DstReg, SrcSubHi, MI->getOperand(1).isKill());
808 MBB.erase(MI);
821 MachineInstr *MI1New = BuildMI(MBB, MI, DL, get(NewOpcd))
827 BuildMI(MBB, MI, DL, get(NewOpcd))
833 MBB.erase(MI);
846 BuildMI(MBB, MI, DL, get(NewOpcd),
851 BuildMI(MBB, MI, DL, get(NewOpcd),
857 MBB.erase(MI);
868 BuildMI(MBB, MI, DL, get(NewOpc), DstReg)
872 MBB.erase(MI);
882 BuildMI(MBB, MI, DL, get(NewOpc))
887 MBB.erase(MI);
892 BuildMI(MBB, MI, DL, get(Hexagon::C2_orn), Reg)
895 MBB.erase(MI);
900 BuildMI(MBB, MI, DL, get(Hexagon::C2_andn), Reg)
903 MBB.erase(MI);
915 BuildMI(MBB, MI, MI->getDebugLoc(), get(Hexagon::M2_mpyi),
918 BuildMI(MBB, MI, MI->getDebugLoc(), get(Hexagon::M2_mpyi),
921 MBB.erase(MI);
940 BuildMI(MBB, MI, MI->getDebugLoc(), get(Hexagon::M2_maci),
943 BuildMI(MBB, MI, MI->getDebugLoc(), get(Hexagon::M2_maci),
946 MBB.erase(MI);
969 BuildMI(MBB, MI, DL, get(Hexagon::A2_tfrpt), Rd)
973 BuildMI(MBB, MI, DL, get(Hexagon::A2_tfrpf), Rd)
976 MBB.erase(MI);
1023 void HexagonInstrInfo::insertNoop(MachineBasicBlock &MBB,
1026 BuildMI(MBB, MI, DL, get(Hexagon::A2_nop));
1208 const MachineBasicBlock *MBB, const MachineFunction &MF) const {
1222 for (auto I : MBB->successors())
2772 MachineBasicBlock& MBB) const {
2775 MachineBasicBlock::instr_iterator I = MBB.instr_end();
2776 if (I == MBB.instr_begin())
2795 } while (I != MBB.instr_begin());
2797 I = MBB.instr_end();
2801 if (I == MBB.instr_begin())
2821 if (I == MBB.instr_begin())
3688 const MachineBasicBlock &MBB = *MI->getParent();
3689 const MachineFunction *MF = MBB.getParent();
