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Lines Matching refs:MipsAsmParser

1 //===-- MipsAsmParser.cpp - Parse Mips assembly to MCInst instructions ----===//
104 class MipsAsmParser : public MCTargetAsmParser {
403 MipsAsmParser(const MCSubtargetInfo &sti, MCAsmParser &parser,
595 MipsOperand(KindTy K, MipsAsmParser &Parser)
600 MipsAsmParser &AsmParser;
645 MipsAsmParser &Parser) {
1147 MipsAsmParser &Parser) {
1160 SMLoc E, MipsAsmParser &Parser) {
1169 MipsAsmParser &Parser) {
1177 MipsAsmParser &Parser) {
1185 SMLoc S, SMLoc E, MipsAsmParser &Parser) {
1193 MipsAsmParser &Parser) {
1201 MipsAsmParser &Parser) {
1209 SMLoc E, MipsAsmParser &Parser) {
1217 SMLoc E, MipsAsmParser &Parser) {
1222 CreateImm(const MCExpr *Val, SMLoc S, SMLoc E, MipsAsmParser &Parser) {
1232 SMLoc E, MipsAsmParser &Parser) {
1243 MipsAsmParser &Parser) {
1254 CreateRegPair(unsigned RegNo, SMLoc S, SMLoc E, MipsAsmParser &Parser) {
1512 bool MipsAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
1942 MipsAsmParser::MacroExpanderResultTy
1943 MipsAsmParser::tryExpandInstruction(MCInst &Inst, SMLoc IDLoc,
2093 bool MipsAsmParser::expandJalWithRegs(MCInst &Inst, SMLoc IDLoc,
2154 bool MipsAsmParser::loadImmediate(int64_t ImmValue, unsigned DstReg,
2318 bool MipsAsmParser::expandLoadImm(MCInst &Inst, bool Is32BitImm, SMLoc IDLoc,
2332 bool MipsAsmParser::expandLoadAddress(unsigned DstReg, unsigned BaseReg,
2360 bool MipsAsmParser::loadAndAddSymbolAddress(
2465 bool MipsAsmParser::expandUncondBranchMMPseudo(
2507 bool MipsAsmParser::expandBranchImm(MCInst &Inst, SMLoc IDLoc,
2551 void MipsAsmParser::expandMemInst(MCInst &Inst, SMLoc IDLoc,
2629 MipsAsmParser::expandLoadStoreMultiple(MCInst &Inst, SMLoc IDLoc,
2657 bool MipsAsmParser::expandCondBranches(MCInst &Inst, SMLoc IDLoc,
2914 bool MipsAsmParser::expandDiv(MCInst &Inst, SMLoc IDLoc,
3030 bool MipsAsmParser::expandUlh(MCInst &Inst, bool Signed, SMLoc IDLoc,
3107 bool MipsAsmParser::expandUlw(MCInst &Inst, SMLoc IDLoc,
3172 bool MipsAsmParser::expandAliasImmediate(MCInst &Inst, SMLoc IDLoc,
3238 bool MipsAsmParser::expandRotation(MCInst &Inst, SMLoc IDLoc,
3301 bool MipsAsmParser::expandRotationImm(MCInst &Inst, SMLoc IDLoc,
3365 bool MipsAsmParser::expandDRotation(MCInst &Inst, SMLoc IDLoc,
3429 bool MipsAsmParser::expandDRotationImm(MCInst &Inst, SMLoc IDLoc,
3524 void MipsAsmParser::createNop(bool hasShortDelaySlot, SMLoc IDLoc,
3532 void MipsAsmParser::createAddu(unsigned DstReg, unsigned SrcReg,
3539 void MipsAsmParser::createCpRestoreMemOp(
3557 unsigned MipsAsmParser::checkTargetMatchPredicate(MCInst &Inst) {
3580 bool MipsAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
3676 void MipsAsmParser::warnIfRegIndexIsAT(unsigned RegIndex, SMLoc Loc) {
3682 void MipsAsmParser::warnIfNoMacro(SMLoc Loc) {
3688 MipsAsmParser::printWarningWithFixIt(const Twine &Msg, const Twine &FixMsg,
3695 int MipsAsmParser::matchCPURegisterName(StringRef Name) {
3773 int MipsAsmParser::matchHWRegsRegisterName(StringRef Name) {
3787 int MipsAsmParser::matchFPURegisterName(StringRef Name) {
3801 int MipsAsmParser::matchFCCRegisterName(StringRef Name) {
3815 int MipsAsmParser::matchACRegisterName(StringRef Name) {
3829 int MipsAsmParser::matchMSA128RegisterName(StringRef Name) {
3841 int MipsAsmParser::matchMSA128CtrlRegisterName(StringRef Name) {
3858 unsigned MipsAsmParser::getATReg(SMLoc Loc) {
3870 unsigned MipsAsmParser::getReg(int RC, int RegNo) {
3874 unsigned MipsAsmParser::getGPR(int RegNo) {
3879 int MipsAsmParser::matchRegisterByNumber(unsigned RegNum, unsigned RegClass) {
3887 bool MipsAsmParser::parseOperand(OperandVector &Operands, StringRef Mnemonic) {
3961 const MCExpr *MipsAsmParser::evaluateRelocExpr(const MCExpr *Expr,
4022 bool MipsAsmParser::isEvaluated(const MCExpr *Expr) {
4043 bool MipsAsmParser::parseRelocOperand(const MCExpr *&Res) {
4086 bool MipsAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc,
4112 bool MipsAsmParser::parseMemOffset(const MCExpr *&Res, bool isParenExpr) {
4144 MipsAsmParser::OperandMatchResultTy
4145 MipsAsmParser::parseMemOperand(OperandVector &Operands) {
4151 MipsAsmParser::OperandMatchResultTy Res = MatchOperand_NoMatch;
4228 bool MipsAsmParser::searchSymbolAlias(OperandVector &Operands) {
4262 MipsAsmParser::OperandMatchResultTy
4263 MipsAsmParser::matchAnyRegisterNameWithoutDollar(OperandVector &Operands,
4318 MipsAsmParser::OperandMatchResultTy
4319 MipsAsmParser::matchAnyRegisterWithoutDollar(OperandVector &Operands, SMLoc S) {
4342 MipsAsmParser::OperandMatchResultTy
4343 MipsAsmParser::parseAnyRegister(OperandVector &Operands) {
4370 MipsAsmParser::OperandMatchResultTy
4371 MipsAsmParser::parseImm(OperandVector &Operands) {
4395 MipsAsmParser::OperandMatchResultTy
4396 MipsAsmParser::parseJumpTarget(OperandVector &Operands) {
4422 MipsAsmParser::OperandMatchResultTy
4423 MipsAsmParser::parseInvNum(OperandVector &Operands) {
4441 MipsAsmParser::OperandMatchResultTy
4442 MipsAsmParser::parseLSAImm(OperandVector &Operands) {
4481 MipsAsmParser::OperandMatchResultTy
4482 MipsAsmParser::parseRegisterList(OperandVector &Operands) {
4567 MipsAsmParser::OperandMatchResultTy
4568 MipsAsmParser::parseRegisterPair(OperandVector &Operands) {
4583 MipsAsmParser::OperandMatchResultTy
4584 MipsAsmParser::parseMovePRegPair(OperandVector &Operands) {
4622 MCSymbolRefExpr::VariantKind MipsAsmParser::getVariantKind(StringRef Symbol) {
4663 bool MipsAsmParser::parseParenSuffix(StringRef Name, OperandVector &Operands) {
4692 bool MipsAsmParser::parseBracketSuffix(StringRef Name,
4716 bool MipsAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
4770 bool MipsAsmParser::reportParseError(Twine ErrorMsg) {
4777 bool MipsAsmParser::reportParseError(SMLoc Loc, Twine ErrorMsg) {
4781 bool MipsAsmParser::parseSetNoAtDirective() {
4801 bool MipsAsmParser::parseSetAtDirective() {
4864 bool MipsAsmParser::parseSetReorderDirective() {
4878 bool MipsAsmParser::parseSetNoReorderDirective() {
4892 bool MipsAsmParser::parseSetMacroDirective() {
4906 bool MipsAsmParser::parseSetNoMacroDirective() {
4924 bool MipsAsmParser::parseSetMsaDirective() {
4937 bool MipsAsmParser::parseSetNoMsaDirective() {
4950 bool MipsAsmParser::parseSetNoDspDirective() {
4965 bool MipsAsmParser::parseSetMips16Directive() {
4981 bool MipsAsmParser::parseSetNoMips16Directive() {
4997 bool MipsAsmParser::parseSetFpDirective() {
5024 bool MipsAsmParser::parseSetOddSPRegDirective() {
5038 bool MipsAsmParser::parseSetNoOddSPRegDirective() {
5052 bool MipsAsmParser::parseSetPopDirective() {
5075 bool MipsAsmParser::parseSetPushDirective() {
5089 bool MipsAsmParser::parseSetSoftFloatDirective() {
5100 bool MipsAsmParser::parseSetHardFloatDirective() {
5111 bool MipsAsmParser::parseSetAssignment() {
5132 bool MipsAsmParser::parseSetMips0Directive() {
5149 bool MipsAsmParser::parseSetArchDirective() {
5189 bool MipsAsmParser
5269 bool MipsAsmParser::eatComma(StringRef ErrorStr) {
5284 // MipsTargetELFStreamer and MipsAsmParser.
5285 bool MipsAsmParser::isPicAndNotNxxAbi() {
5289 bool MipsAsmParser::parseDirectiveCpLoad(SMLoc Loc) {
5321 bool MipsAsmParser::parseDirectiveCpRestore(SMLoc Loc) {
5369 bool MipsAsmParser::parseDirectiveCPSetup() {
5444 bool MipsAsmParser::parseDirectiveCPReturn() {
5450 bool MipsAsmParser::parseDirectiveNaN() {
5471 bool MipsAsmParser::parseDirectiveSet() {
5565 bool MipsAsmParser::parseDataDirective(unsigned Size, SMLoc L) {
5590 bool MipsAsmParser::parseDirectiveGpWord() {
5608 bool MipsAsmParser::parseDirectiveGpDWord() {
5624 bool MipsAsmParser::parseDirectiveOption() {
5638 // MipsAsmParser needs to know if the current PIC mode changes.
5652 // MipsAsmParser needs to know if the current PIC mode changes.
5674 bool MipsAsmParser::parseInsnDirective() {
5695 bool MipsAsmParser::parseDirectiveModule() {
5804 bool MipsAsmParser::parseDirectiveModuleFP() {
5836 bool MipsAsmParser::parseFpABIValue(MipsABIFlagsSection::FpABIKind &FpABI,
5907 bool MipsAsmParser::ParseDirective(AsmToken DirectiveID) {
6182 bool MipsAsmParser::parseInternalDirectiveReallowModule() {
6196 RegisterMCAsmParser<MipsAsmParser> X(TheMipsTarget);
6197 RegisterMCAsmParser<MipsAsmParser> Y(TheMipselTarget);
6198 RegisterMCAsmParser<MipsAsmParser> A(TheMips64Target);
6199 RegisterMCAsmParser<MipsAsmParser> B(TheMips64elTarget);