Lines Matching refs:MBB
59 bool expandInstr(MachineBasicBlock &MBB, Iter I);
60 void expandLoadCCond(MachineBasicBlock &MBB, Iter I);
61 void expandStoreCCond(MachineBasicBlock &MBB, Iter I);
62 void expandLoadACC(MachineBasicBlock &MBB, Iter I, unsigned RegSize);
63 void expandStoreACC(MachineBasicBlock &MBB, Iter I, unsigned MFHiOpc,
65 bool expandCopy(MachineBasicBlock &MBB, Iter I);
66 bool expandCopyACC(MachineBasicBlock &MBB, Iter I, unsigned MFHiOpc,
68 bool expandBuildPairF64(MachineBasicBlock &MBB,
70 bool expandExtractElementF64(MachineBasicBlock &MBB,
98 bool ExpandPseudo::expandInstr(MachineBasicBlock &MBB, Iter I) {
101 expandLoadCCond(MBB, I);
104 expandStoreCCond(MBB, I);
108 expandLoadACC(MBB, I, 4);
111 expandLoadACC(MBB, I, 8);
114 expandStoreACC(MBB, I, Mips::PseudoMFHI, Mips::PseudoMFLO, 4);
117 expandStoreACC(MBB, I, Mips::MFHI_DSP, Mips::MFLO_DSP, 4);
120 expandStoreACC(MBB, I, Mips::PseudoMFHI64, Mips::PseudoMFLO64, 8);
123 if (expandBuildPairF64(MBB, I, false))
124 MBB.erase(I);
127 if (expandBuildPairF64(MBB, I, true))
128 MBB.erase(I);
131 if (expandExtractElementF64(MBB, I, false))
132 MBB.erase(I);
135 if (expandExtractElementF64(MBB, I, true))
136 MBB.erase(I);
139 if (!expandCopy(MBB, I))
146 MBB.erase(I);
150 void ExpandPseudo::expandLoadCCond(MachineBasicBlock &MBB, Iter I) {
160 TII.loadRegFromStack(MBB, I, VR, FI, RC, &RegInfo, 0);
161 BuildMI(MBB, I, I->getDebugLoc(), TII.get(TargetOpcode::COPY), Dst)
165 void ExpandPseudo::expandStoreCCond(MachineBasicBlock &MBB, Iter I) {
175 BuildMI(MBB, I, I->getDebugLoc(), TII.get(TargetOpcode::COPY), VR)
177 TII.storeRegToStack(MBB, I, VR, true, FI, RC, &RegInfo, 0);
180 void ExpandPseudo::expandLoadACC(MachineBasicBlock &MBB, Iter I,
198 TII.loadRegFromStack(MBB, I, VR0, FI, RC, &RegInfo, 0);
199 BuildMI(MBB, I, DL, Desc, Lo).addReg(VR0, RegState::Kill);
200 TII.loadRegFromStack(MBB, I, VR1, FI, RC, &RegInfo, RegSize);
201 BuildMI(MBB, I, DL, Desc, Hi).addReg(VR1, RegState::Kill);
204 void ExpandPseudo::expandStoreACC(MachineBasicBlock &MBB, Iter I,
221 BuildMI(MBB, I, DL, TII.get(MFLoOpc), VR0).addReg(Src);
222 TII.storeRegToStack(MBB, I, VR0, true, FI, RC, &RegInfo, 0);
223 BuildMI(MBB, I, DL, TII.get(MFHiOpc), VR1).addReg(Src, SrcKill);
224 TII.storeRegToStack(MBB, I, VR1, true, FI, RC, &RegInfo, RegSize);
227 bool ExpandPseudo::expandCopy(MachineBasicBlock &MBB, Iter I) {
234 return expandCopyACC(MBB, I, Opcodes.first, Opcodes.second);
237 bool ExpandPseudo::expandCopyACC(MachineBasicBlock &MBB, Iter I,
254 BuildMI(MBB, I, DL, TII.get(MFLoOpc), VR0).addReg(Src);
255 BuildMI(MBB, I, DL, TII.get(TargetOpcode::COPY), DstLo)
257 BuildMI(MBB, I, DL, TII.get(MFHiOpc), VR1).addReg(Src, SrcKill);
258 BuildMI(MBB, I, DL, TII.get(TargetOpcode::COPY), DstHi)
268 bool ExpandPseudo::expandBuildPairF64(MachineBasicBlock &MBB,
304 TII.storeRegToStack(MBB, I, LoReg, I->getOperand(1).isKill(), FI, RC,
306 TII.storeRegToStack(MBB, I, HiReg, I->getOperand(2).isKill(), FI, RC,
308 TII.loadRegFromStack(MBB, I, DstReg, FI, RC2, &RegInfo, 0);
320 bool ExpandPseudo::expandExtractElementF64(MachineBasicBlock &MBB,
328 BuildMI(MBB, I, I->getDebugLoc(), TII.get(Mips::IMPLICIT_DEF), DstReg);
365 TII.storeRegToStack(MBB, I, SrcReg, Op1.isKill(), FI, RC, &RegInfo, 0);
366 TII.loadRegFromStack(MBB, I, DstReg, FI, RC2, &RegInfo, Offset);
377 MachineBasicBlock &MBB) const {
378 assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
387 MachineBasicBlock::iterator MBBI = MBB.begin();
411 TII.adjustStackPtr(SP, -StackSize, MBB, MBBI);
416 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
420 emitInterruptPrologueStub(MF, MBB);
450 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
455 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
466 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
471 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
477 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
486 if (!MBB.isLiveIn(ABI.GetEhDataReg(I)))
487 MBB.addLiveIn(ABI.GetEhDataReg(I));
488 TII.storeRegToStackSlot(MBB, MBBI, ABI.GetEhDataReg(I), false,
498 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
506 BuildMI(MBB, MBBI, dl, TII.get(MOVE), FP).addReg(SP).addReg(ZERO)
512 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
523 BuildMI(MBB, MBBI, dl, TII.get(ADDiu), VR).addReg(ZERO) .addImm(MaxAlign);
524 BuildMI(MBB, MBBI, dl, TII.get(AND), SP).addReg(SP).addReg(VR);
529 BuildMI(MBB, MBBI, dl, TII.get(MOVE), BP)
538 MachineFunction &MF, MachineBasicBlock &MBB) const {
541 MachineBasicBlock::iterator MBBI = MBB.begin();
542 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
575 MBB.addLiveIn(Mips::COP013);
576 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::MFC0), Mips::K0)
581 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::EXT), Mips::K0)
589 MBB.addLiveIn(Mips::COP014);
590 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::MFC0), Mips::K1)
595 STI.getInstrInfo()->storeRegToStack(MBB, MBBI, Mips::K1, false,
600 MBB.addLiveIn(Mips::COP012);
601 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::MFC0), Mips::K1)
606 STI.getInstrInfo()->storeRegToStack(MBB, MBBI, Mips::K1, false,
635 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::INS), Mips::K1)
643 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::INS), Mips::K1)
652 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::INS), Mips::K1)
660 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::MTC0), Mips::COP012)
667 MachineBasicBlock &MBB) const {
668 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
693 BuildMI(MBB, I, DL, TII.get(MOVE), SP).addReg(FP).addReg(ZERO);
707 TII.loadRegFromStackSlot(MBB, I, ABI.GetEhDataReg(J),
713 emitInterruptEpilogueStub(MF, MBB);
722 TII.adjustStackPtr(SP, StackSize, MBB, MBBI);
726 MachineFunction &MF, MachineBasicBlock &MBB) const {
728 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
730 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
736 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::DI), Mips::ZERO);
737 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::EHB));
740 STI.getInstrInfo()->loadRegFromStackSlot(MBB, MBBI, Mips::K1,
743 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::MTC0), Mips::COP014)
748 STI.getInstrInfo()->loadRegFromStackSlot(MBB, MBBI, Mips::K1,
751 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::MTC0), Mips::COP012)
772 spillCalleeSavedRegisters(MachineBasicBlock &MBB,
776 MachineFunction *MF = MBB.getParent();
796 const Function *Func = MBB.getParent()->getFunction();
808 BuildMI(MBB, MI, DL, TII.get(Op), Mips::K0)
