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40 // (1) Work out the address that each block would have if no branches
44 // (2) Work out the address that each block would have if all branches
47 // (3) Walk through the block calculating the final address of each instruction
49 // this check uses the final address of the target block, as calculated
51 // address of the target block that was calculated in (2). Both checks
76 // The address that we currently assume the block has.
77 uint64_t Address;
91 : Address(0), Size(0), Alignment(0), NumTerminators(0) {}
100 // The address that we currently assume the terminator has.
101 uint64_t Address;
120 // The address that we assume this position has.
121 uint64_t Address;
123 // The number of low bits in Address that are known to be the same
124 // as the runtime address.
128 : Address(0), KnownBits(InitialAlignment) {}
149 bool mustRelaxBranch(const TerminatorInfo &Terminator, uint64_t Address);
179 // When calculating the address of Block, we need to conservatively
181 Position.Address += ((uint64_t(1) << Block.Alignment) -
188 Position.Address = (Position.Address + AlignMask) & ~AlignMask;
191 Block.Address = Position.Address;
194 Position.Address += Block.Size;
203 Terminator.Address = Position.Address;
204 Position.Address += Terminator.Size;
206 Position.Address += Terminator.ExtraRelaxSize;
300 return Position.Address;
304 // relaxed if it were placed at address Address.
306 uint64_t Address) {
311 if (Address >= Target.Address) {
312 if (Address - Target.Address <= MaxBackwardRange)
315 if (Target.Address - Address <= MaxForwardRange)
326 if (mustRelaxBranch(Terminator, Terminator.Address))
331 // Set the address of each block on the assumption that all branches
440 assert(Position.Address <= TI->Address &&
442 if (mustRelaxBranch(*TI, Position.Address))