Lines Matching defs:Opcode
585 /// EmitVEXOpcodePrefix - AVX instructions are encoded using a opcode prefix
600 // VEX_R: opcode externsion equivalent to REX.R in
623 // VEX_W: opcode specific (use like REX.W, or used for
624 // opcode extension, or ignored, depending on the opcode byte)
630 // 0b00001: implied 0F leading opcode
631 // 0b00010: implied 0F 38 leading opcode bytes
632 // 0b00011: implied 0F 3A leading opcode bytes
652 // VEX_PP: opcode extension providing equivalent
919 // VEX opcode prefix can have 2 or 3 bytes
949 // EVEX opcode prefix can have 4 bytes
1086 /// EmitSegmentOverridePrefix - Emit segment override opcode prefix as needed
1104 /// EmitOpcodePrefix - Emit all instruction prefixes prior to the opcode.
1114 // Emit the operand size opcode prefix as needed.
1119 // Emit the LOCK opcode prefix.
1142 // 0x0F escape code must be emitted just before the opcode.
1144 case X86II::TB: // Two-byte opcode map
1165 unsigned Opcode = MI.getOpcode();
1166 const MCInstrDesc &Desc = MCII.get(Opcode);
1193 int MemoryOperand = X86II::getMemoryOperandNo(TSFlags, Opcode);
1196 // Emit segment override opcode prefix as needed.
1201 // Emit the repeat opcode prefix as needed.
1205 // Emit the address size opcode prefix as needed.
1251 // Emit segment override opcode prefix as needed (not for %ds).
1264 // Emit segment override opcode prefix as needed (not for %ds).
1289 // Emit segment override opcode prefix as needed.
