Lines Matching refs:SetCCOpcode
4044 static X86::CondCode TranslateIntegerX86CC(ISD::CondCode SetCCOpcode) {
4045 switch (SetCCOpcode) {
4063 static unsigned TranslateX86CC(ISD::CondCode SetCCOpcode, SDLoc DL, bool isFP,
4067 if (SetCCOpcode == ISD::SETGT && RHSC->isAllOnesValue()) {
4072 if (SetCCOpcode == ISD::SETLT && RHSC->isNullValue()) {
4076 if (SetCCOpcode == ISD::SETLT && RHSC->getZExtValue() == 1) {
4083 return TranslateIntegerX86CC(SetCCOpcode);
4091 SetCCOpcode = getSetCCSwappedOperands(SetCCOpcode);
4095 switch (SetCCOpcode) {
4111 switch (SetCCOpcode) {
14199 static int translateX86FSETCC(ISD::CondCode SetCCOpcode, SDValue &Op0,
14213 switch (SetCCOpcode) {
14281 ISD::CondCode SetCCOpcode = cast<CondCodeSDNode>(CC)->get();
14286 switch (SetCCOpcode) {
14327 ISD::CondCode SetCCOpcode = cast<CondCodeSDNode>(CC)->get();
14332 switch (SetCCOpcode) {
14391 ISD::CondCode SetCCOpcode = cast<CondCodeSDNode>(CC)->get();
14401 unsigned SSECC = translateX86FSETCC(SetCCOpcode, Op0, Op1);
14411 if (SetCCOpcode == ISD::SETUEQ) {
14414 assert(SetCCOpcode == ISD::SETONE);
14449 SDValue NewOp = DAG.getSetCC(dl, VTOp0, Op0, Op1, SetCCOpcode);
14489 switch (SetCCOpcode) {
14504 unsigned Opc = ISD::isUnsignedIntSetCC(SetCCOpcode)
14518 switch (SetCCOpcode) {
14542 switch (SetCCOpcode) {
14557 switch (SetCCOpcode) {
