Lines Matching refs:Value
26 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
45 Value *A; const APInt *B;
49 Value *Rem = Builder->CreateAnd(A, ConstantInt::get(I.getType(), *B-1),
58 /// See if we can compute the specified value, but shifted
69 /// value.
70 static bool CanEvaluateShifted(Value *V, unsigned NumBits, bool isLeftShift,
81 // the value which means that we don't care if the shift has multiple uses.
82 // TODO: Handle opposite shift by exact value.
178 for (Value *IncValue : PN->incoming_values())
188 /// this value inserts the new computation that produces the shifted value.
189 static Value *GetShiftedValue(Value *V, unsigned NumBits, bool isLeftShift,
321 Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, Constant *Op1,
382 Value *NSh = Builder->CreateBinOp(I.getOpcode(), TrOp, ShAmt,I.getName());
404 Value *And = Builder->CreateAnd(NSh,
408 // Return the value truncated to the interesting size.
416 Value *V1, *V2;
429 Value *YS = // (Y << C)
432 Value *X = Builder->CreateBinOp(Op0BO->getOpcode(), YS, V1,
444 Value *Op0BOOp1 = Op0BO->getOperand(1);
449 Value *YS = // (Y << C)
453 Value *XM = Builder->CreateAnd(V1, ConstantExpr::getShl(CC, Op1),
465 Value *YS = // (Y << C)
468 Value *X = Builder->CreateBinOp(Op0BO->getOpcode(), V1, YS,
484 Value *YS = // (Y << C)
487 Value *XM = Builder->CreateAnd(V1, ConstantExpr::getShl(CC, Op1),
520 // The highBitSet boolean indicates the value of the high bit of
530 Value *NewShift =
565 Value *X = ShiftOp->getOperand(0);
622 Value *Shift = Builder->CreateLShr(X, ShiftDiffCst);
670 Value *Shift = Builder->CreateShl(X, ShiftDiffCst);
696 if (Value *V = SimplifyVectorOp(I))
699 if (Value *V =
710 // If the shifted-out value is known-zero, then this is a NUW shift.
719 // If the shifted out value is all signbits, this is a NSW shift.
729 Value *A;
738 if (Value *V = SimplifyVectorOp(I))
741 if (Value *V = SimplifyLShrInst(I.getOperand(0), I.getOperand(1), I.isExact(),
748 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
764 Value *Cmp = Builder->CreateICmpEQ(II->getArgOperand(0), RHS);
769 // If the shifted-out value is known-zero, then this is an exact shift.
782 if (Value *V = SimplifyVectorOp(I))
785 if (Value *V = SimplifyAShrInst(I.getOperand(0), I.getOperand(1), I.isExact(),
792 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
799 Value *X;
801 // If the input is an extension from the shifted amount value, e.g.
814 // If the shifted-out value is known-zero, then this is an exact shift.
