Lines Matching refs:s32
50 vqrdmlah.s32 d0, d1, d2
51 //CHECK-V81aARM: vqrdmlah.s32 d0, d1, d2 @ encoding: [0x12,0x0b,0x21,0xf3]
52 //CHECK-V81aTHUMB: vqrdmlah.s32 d0, d1, d2 @ encoding: [0x21,0xff,0x12,0x0b]
54 //CHECK-V8: vqrdmlah.s32 d0, d1, d2
64 vqrdmlah.s32 q2, q3, q0
65 //CHECK-V81aARM: vqrdmlah.s32 q2, q3, q0 @ encoding: [0x50,0x4b,0x26,0xf3]
66 //CHECK-V81aTHUMB: vqrdmlah.s32 q2, q3, q0 @ encoding: [0x26,0xff,0x50,0x4b]
68 //CHECK-V8: vqrdmlah.s32 q2, q3, q0
79 vqrdmlsh.s32 d0, d1, d2
80 //CHECK-V81aARM: vqrdmlsh.s32 d0, d1, d2 @ encoding: [0x12,0x0c,0x21,0xf3]
81 //CHECK-V81aTHUMB: vqrdmlsh.s32 d0, d1, d2 @ encoding: [0x21,0xff,0x12,0x0c]
83 //CHECK-V8: vqrdmlsh.s32 d0, d1, d2
93 vqrdmlsh.s32 q3, q4, q5
94 //CHECK-V81aARM: vqrdmlsh.s32 q3, q4, q5 @ encoding: [0x5a,0x6c,0x28,0xf3]
95 //CHECK-V81aTHUMB: vqrdmlsh.s32 q3, q4, q5 @ encoding: [0x28,0xff,0x5a,0x6c]
97 //CHECK-V8: vqrdmlsh.s32 q3, q4, q5
126 vqrdmlah.s32 d0, d1, d2[0]
127 //CHECK-V81aARM: vqrdmlah.s32 d0, d1, d2[0] @ encoding: [0x42,0x0e,0xa1,0xf2]
128 //CHECK-V81aTHUMB: vqrdmlah.s32 d0, d1, d2[0] @ encoding: [0xa1,0xef,0x42,0x0e]
130 //CHECK-V8: vqrdmlah.s32 d0, d1, d2[0]
140 vqrdmlah.s32 q0, q1, d2[0]
141 //CHECK-V81aARM: vqrdmlah.s32 q0, q1, d2[0] @ encoding: [0x42,0x0e,0xa2,0xf3]
142 //CHECK-V81aTHUMB: vqrdmlah.s32 q0, q1, d2[0] @ encoding: [0xa2,0xff,0x42,0x0e]
144 //CHECK-V8: vqrdmlah.s32 q0, q1, d2[0]
155 vqrdmlsh.s32 d0, d1, d2[0]
156 //CHECK-V81aARM: vqrdmlsh.s32 d0, d1, d2[0] @ encoding: [0x42,0x0f,0xa1,0xf2]
157 //CHECK-V81aTHUMB: vqrdmlsh.s32 d0, d1, d2[0] @ encoding: [0xa1,0xef,0x42,0x0f]
159 //CHECK-V8: vqrdmlsh.s32 d0, d1, d2[0]
169 vqrdmlsh.s32 q0, q1, d2[0]
170 //CHECK-V81aARM: vqrdmlsh.s32 q0, q1, d2[0] @ encoding: [0x42,0x0f,0xa2,0xf3]
171 //CHECK-V81aTHUMB: vqrdmlsh.s32 q0, q1, d2[0] @ encoding: [0xa2,0xff,0x42,0x0f]
173 //CHECK-V8: vqrdmlsh.s32 q0, q1, d2[0]
