Lines Matching full:reg_map
52 static SLJIT_CONST sljit_ub reg_map[SLJIT_NUMBER_OF_REGISTERS + 6] = {
1163 FAIL_IF(ADDLI_SOLO(reg_map[dst_ar], ZERO, imm >> 48));
1164 FAIL_IF(SHL16INSLI_SOLO(reg_map[dst_ar], reg_map[dst_ar], imm >> 32));
1165 FAIL_IF(SHL16INSLI_SOLO(reg_map[dst_ar], reg_map[dst_ar], imm >> 16));
1166 return SHL16INSLI_SOLO(reg_map[dst_ar], reg_map[dst_ar], imm);
1169 FAIL_IF(ADDLI(reg_map[dst_ar], ZERO, imm >> 48));
1170 FAIL_IF(SHL16INSLI(reg_map[dst_ar], reg_map[dst_ar], imm >> 32));
1171 FAIL_IF(SHL16INSLI(reg_map[dst_ar], reg_map[dst_ar], imm >> 16));
1172 return SHL16INSLI(reg_map[dst_ar], reg_map[dst_ar], imm);
1209 FAIL_IF(ST_ADD(ADDR_TMP_mapped, reg_map[i], -8));
1214 FAIL_IF(ST_ADD(ADDR_TMP_mapped, reg_map[i], -8));
1219 FAIL_IF(ADD(reg_map[SLJIT_S0 - i], i, ZERO));
1269 FAIL_IF(LD_ADD(reg_map[i], ADDR_TMP_mapped, -8));
1274 FAIL_IF(LD_ADD(reg_map[i], ADDR_TMP_mapped, -8));
1298 FAIL_IF(ADDLI(ADDR_TMP_mapped, reg_map[arg & REG_MASK], argw));
1360 if ((flags & WRITE_BACK) && reg_ar == reg_map[base]) {
1361 SLJIT_ASSERT(!(flags & LOAD_DATA) && reg_map[TMP_REG1] != reg_ar);
1380 FAIL_IF(ADD(TMP_REG3_mapped, reg_map[base], TMP_REG3_mapped));
1387 FAIL_IF(ADD(tmp_ar, reg_map[base], TMP_REG3_mapped));
1395 FAIL_IF(ADD(reg_map[base], reg_map[base], TMP_REG3_mapped));
1397 return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, reg_map[base]);
1399 return PB2(data_transfer_insts[flags & MEM_MASK], reg_map[base], reg_ar);
1407 FAIL_IF(SHLI(TMP_REG3_mapped, reg_map[OFFS_REG(arg)], argw));
1414 FAIL_IF(ADD(TMP_REG3_mapped, reg_map[base], reg_map[!argw ? OFFS_REG(arg) : TMP_REG3]));
1417 FAIL_IF(ADD(tmp_ar, reg_map[base], reg_map[!argw ? OFFS_REG(arg) : TMP_REG3]));
1425 FAIL_IF(ADD(reg_map[base], reg_map[base], reg_map[!argw ? OFFS_REG(arg) : TMP_REG3]));
1428 return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, reg_map[base]);
1430 return PB2(data_transfer_insts[flags & MEM_MASK], reg_map[base], reg_ar);
1435 if (reg_ar == reg_map[base]) {
1438 FAIL_IF(ADDLI(ADDR_TMP_mapped, reg_map[base], argw));
1445 return ADDLI(reg_map[base], reg_map[base], argw);
1456 FAIL_IF(ADDLI(reg_map[base], reg_map[base], argw));
1466 FAIL_IF(ADD(reg_map[base], reg_map[base], TMP_REG3_mapped));
1471 FAIL_IF(ADD(reg_map[base], reg_map[base], TMP_REG3_mapped));
1476 return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, reg_map[base]);
1478 return PB2(data_transfer_insts[flags & MEM_MASK], reg_map[base], reg_ar);
1518 FAIL_IF(ADD(TMP_REG3_mapped, TMP_REG3_mapped, reg_map[base]));
1525 FAIL_IF(ADD(tmp_ar, TMP_REG3_mapped, reg_map[base]));
1561 return ADD(reg_map[dst], RA, ZERO);
1574 FAIL_IF(ADD(RA, reg_map[src], ZERO));
1594 return ADD(reg_map[dst], reg_map[src2], ZERO);
1602 return BFEXTS(reg_map[dst], reg_map[src2], 0, 31);
1604 return BFEXTU(reg_map[dst], reg_map[src2], 0, 31);
1607 return ADD(reg_map[dst], reg_map[src2], ZERO);
1617 return BFEXTS(reg_map[dst], reg_map[src2], 0, 7);
1619 return BFEXTU(reg_map[dst], reg_map[src2], 0, 7);
1622 return ADD(reg_map[dst], reg_map[src2], ZERO);
1632 return BFEXTS(reg_map[dst], reg_map[src2], 0, 15);
1634 return BFEXTU(reg_map[dst], reg_map[src2], 0, 15);
1637 return ADD(reg_map[dst], reg_map[src2], ZERO);
1645 FAIL_IF(NOR(EQUAL_FLAG, reg_map[src2], reg_map[src2]));
1647 FAIL_IF(NOR(reg_map[dst], reg_map[src2], reg_map[src2]));
1654 FAIL_IF(CLZ(EQUAL_FLAG, reg_map[src2]));
1656 FAIL_IF(CLZ(reg_map[dst], reg_map[src2]));
1663 FAIL_IF(SHRUI(TMP_EREG1, reg_map[src1], 63));
1669 FAIL_IF(ADDLI(EQUAL_FLAG, reg_map[src1], src2));
1673 FAIL_IF(ORI(ULESS_FLAG ,reg_map[src1], src2));
1676 FAIL_IF(OR(ULESS_FLAG,reg_map[src1],ULESS_FLAG));
1682 FAIL_IF(ADDLI(reg_map[dst], reg_map[src1], src2));
1685 FAIL_IF(SHRUI(OVERFLOW_FLAG, reg_map[dst], 63));
1692 FAIL_IF(XOR(TMP_EREG1, reg_map[src1], reg_map[src2]));
1696 overflow_ra = reg_map[src1];
1698 overflow_ra = reg_map[src2];
1701 FAIL_IF(ADD(TMP_EREG2, reg_map[src1], ZERO));
1707 FAIL_IF(ADD(EQUAL_FLAG ,reg_map[src1], reg_map[src2]));
1710 FAIL_IF(OR(ULESS_FLAG,reg_map[src1], reg_map[src2]));
1714 FAIL_IF(ADD(reg_map[dst],reg_map[src1], reg_map[src2]));
1717 FAIL_IF(XOR(OVERFLOW_FLAG,reg_map[dst], overflow_ra));
1724 FAIL_IF(CMPLTU(ULESS_FLAG ,reg_map[dst] ,ULESS_FLAG));
1735 FAIL_IF(ORI(TMP_EREG1, reg_map[src1], src2));
1738 FAIL_IF(OR(TMP_EREG1, reg_map[src1], TMP_EREG1));
1742 FAIL_IF(ADDLI(reg_map[dst], reg_map[src1], src2));
1746 FAIL_IF(OR(TMP_EREG1, reg_map[src1], reg_map[src2]));
1749 FAIL_IF(ADD(reg_map[dst], reg_map[src1], reg_map[src2]));
1753 FAIL_IF(CMPLTU(TMP_EREG1, reg_map[dst], TMP_EREG1));
1755 FAIL_IF(ADD(reg_map[dst], reg_map[dst], ULESS_FLAG));
1761 FAIL_IF(CMPLTUI(TMP_EREG2, reg_map[dst], 1));
1775 FAIL_IF(SHRUI(TMP_EREG1,reg_map[src1], 63));
1781 overflow_ra = reg_map[src1];
1784 FAIL_IF(ADD(TMP_EREG2, reg_map[src1], ZERO));
1790 FAIL_IF(ADDLI(EQUAL_FLAG, reg_map[src1], -src2));
1794 FAIL_IF(CMPLTU(ULESS_FLAG, reg_map[src1], ADDR_TMP_mapped));
1799 FAIL_IF(ADDLI(reg_map[dst], reg_map[src1], -src2));
1804 FAIL_IF(XOR(TMP_EREG1, reg_map[src1], reg_map[src2]));
1808 overflow_ra = reg_map[src1];
1811 FAIL_IF(ADD(TMP_EREG2, reg_map[src1], ZERO));
1817 FAIL_IF(SUB(EQUAL_FLAG, reg_map[src1], reg_map[src2]));
1820 FAIL_IF(CMPLTU(ULESS_FLAG, reg_map[src1], reg_map[src2]));
1823 FAIL_IF(CMPLTU(UGREATER_FLAG, reg_map[src2], reg_map[src1]));
1826 FAIL_IF(CMPLTS(LESS_FLAG ,reg_map[src1] ,reg_map[src2]));
1827 FAIL_IF(CMPLTS(GREATER_FLAG ,reg_map[src2] ,reg_map[src1]));
1832 FAIL_IF(SUB(reg_map[dst], reg_map[src1], reg_map[src2]));
1836 FAIL_IF(XOR(OVERFLOW_FLAG, reg_map[dst], overflow_ra));
1853 FAIL_IF(CMPLTU(TMP_EREG1, reg_map[src1], ADDR_TMP_mapped));
1857 FAIL_IF(ADDLI(reg_map[dst], reg_map[src1], -src2));
1861 FAIL_IF(CMPLTU(TMP_EREG1, reg_map[src1], reg_map[src2]));
1863 FAIL_IF(SUB(reg_map[dst], reg_map[src1], reg_map[src2]));
1867 FAIL_IF(CMOVEQZ(TMP_EREG1, reg_map[dst], ULESS_FLAG));
1869 FAIL_IF(SUB(reg_map[dst], reg_map[dst], ULESS_FLAG));
1883 FAIL_IF(MUL(reg_map[dst], reg_map[src1], reg_map[src2]));
1892 compiler, op_norm, EQUAL_FLAG, reg_map[src1], \
1896 compiler, op_norm, reg_map[dst], reg_map[src1], \
1901 compiler, op_norm, EQUAL_FLAG, reg_map[src1], \
1902 reg_map[src2], __LINE__)); \
1905 compiler, op_norm, reg_map[dst], reg_map[src1], \
1906 reg_map[src2], __LINE__)); \
1925 compiler, op_imm, EQUAL_FLAG, reg_map[src1], \
1929 compiler, op_imm, reg_map[dst], reg_map[src1], \
1934 compiler, op_norm, EQUAL_FLAG, reg_map[src1], \
1935 reg_map[src2], __LINE__)); \
1938 compiler, op_norm, reg_map[dst], reg_map[src1], \
1939 reg_map[src2], __LINE__)); \
2041 FAIL_IF(load_immediate(compiler, reg_map[sugg_src2_r], src2w));
2050 if (getput_arg_fast(compiler, flags | LOAD_DATA, reg_map[sugg_src2_r], src2, src2w))
2069 FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, reg_map[sugg_src2_r], src2, src2w, dst, dstw));
2075 getput_arg_fast(compiler, flags, reg_map[dst_r], dst, dstw);
2079 return getput_arg(compiler, flags, reg_map[dst_r], dst, dstw, 0, 0);
2101 sugg_dst_ar = reg_map[(op < SLJIT_ADD && FAST_IS_REG(dst)) ? dst : TMP_REG2];
2327 if (reg_map[src] != 0)
2330 FAIL_IF(ADD_SOLO(TMP_REG2_mapped, reg_map[src], ZERO));
2334 SLJIT_ASSERT(reg_map[PIC_ADDR_REG] == 16 && PIC_ADDR_REG == TMP_REG2);
2337 FAIL_IF(emit_const(compiler, reg_map[PIC_ADDR_REG], srcw, 1));
2343 FAIL_IF(ADD_SOLO(0, reg_map[SLJIT_R0], ZERO));
2347 FAIL_IF(JALR_SOLO(reg_map[PIC_ADDR_REG]));
2354 FAIL_IF(ADD_SOLO(0, reg_map[SLJIT_R0], ZERO));
2356 FAIL_IF(ADD_SOLO(reg_map[PIC_ADDR_REG], reg_map[src_r], ZERO));
2360 FAIL_IF(JALR_SOLO(reg_map[src_r]));
2375 FAIL_IF(JR_SOLO(reg_map[src_r]));
2378 FAIL_IF(JR_SOLO(reg_map[src_r]));
2388 FAIL_IF(JR_SOLO(reg_map[src_r]));
2477 SLJIT_ASSERT(reg_map[PIC_ADDR_REG] == 16 && PIC_ADDR_REG == TMP_REG2);
2480 PTR_FAIL_IF(ADD_SOLO(0, reg_map[SLJIT_R0], ZERO));
2551 return reg_map[reg];
