Home | History | Annotate | Download | only in ia32

Lines Matching refs:Operand

191 // Implementation of Operand
193 Operand::Operand(Register base, int32_t disp, RelocInfo::Mode rmode) {
213 Operand::Operand(Register base,
238 Operand::Operand(Register index,
250 bool Operand::is_reg(Register reg) const {
256 bool Operand::is_reg_only() const {
261 Register Operand::reg() const {
457 void Assembler::push(const Operand& src) {
471 void Assembler::pop(const Operand& dst) {
492 void Assembler::mov_b(Register dst, const Operand& src) {
500 void Assembler::mov_b(const Operand& dst, const Immediate& src) {
508 void Assembler::mov_b(const Operand& dst, Register src) {
516 void Assembler::mov_w(Register dst, const Operand& src) {
524 void Assembler::mov_w(const Operand& dst, Register src) {
532 void Assembler::mov_w(const Operand& dst, const Immediate& src) {
563 void Assembler::mov(Register dst, const Operand& src) {
577 void Assembler::mov(const Operand& dst, const Immediate& x) {
585 void Assembler::mov(const Operand& dst, Handle<Object> handle) {
593 void Assembler::mov(const Operand& dst, Register src) {
600 void Assembler::movsx_b(Register dst, const Operand& src) {
608 void Assembler::movsx_w(Register dst, const Operand& src) {
616 void Assembler::movzx_b(Register dst, const Operand& src) {
624 void Assembler::movzx_w(Register dst, const Operand& src) {
632 void Assembler::cmov(Condition cc, Register dst, const Operand& src) {
678 void Assembler::xchg(Register dst, const Operand& src) {
687 emit_arith(2, Operand(dst), Immediate(imm32));
691 void Assembler::adc(Register dst, const Operand& src) {
698 void Assembler::add(Register dst, const Operand& src) {
705 void Assembler::add(const Operand& dst, Register src) {
712 void Assembler::add(const Operand& dst, const Immediate& x) {
726 emit_arith(4, Operand(dst), x);
730 void Assembler::and_(Register dst, const Operand& src) {
737 void Assembler::and_(const Operand& dst, const Immediate& x) {
743 void Assembler::and_(const Operand& dst, Register src) {
750 void Assembler::cmpb(const Operand& op, int8_t imm8) {
762 void Assembler::cmpb(const Operand& op, Register reg) {
770 void Assembler::cmpb(Register reg, const Operand& op) {
778 void Assembler::cmpw(const Operand& op, Immediate imm16) {
790 emit_arith(7, Operand(reg), Immediate(imm32));
796 emit_arith(7, Operand(reg), Immediate(handle));
800 void Assembler::cmp(Register reg, const Operand& op) {
807 void Assembler::cmp(const Operand& op, const Immediate& imm) {
813 void Assembler::cmp(const Operand& op, Handle<Object> handle) {
819 void Assembler::cmpb_al(const Operand& op) {
826 void Assembler::cmpw_ax(const Operand& op) {
842 void Assembler::dec_b(const Operand& dst) {
855 void Assembler::dec(const Operand& dst) {
868 void Assembler::idiv(const Operand& src) {
875 void Assembler::div(const Operand& src) {
889 void Assembler::imul(Register dst, const Operand& src) {
898 imul(dst, Operand(src), imm32);
902 void Assembler::imul(Register dst, const Operand& src, int32_t imm32) {
922 void Assembler::inc(const Operand& dst) {
929 void Assembler::lea(Register dst, const Operand& src) {
950 void Assembler::neg(const Operand& dst) {
964 void Assembler::not_(const Operand& dst) {
973 emit_arith(1, Operand(dst), Immediate(imm32));
977 void Assembler::or_(Register dst, const Operand& src) {
984 void Assembler::or_(const Operand& dst, const Immediate& x) {
990 void Assembler::or_(const Operand& dst, Register src) {
1025 void Assembler::ror(const Operand& dst, uint8_t imm8) {
1039 void Assembler::ror_cl(const Operand& dst) {
1046 void Assembler::sar(const Operand& dst, uint8_t imm8) {
1060 void Assembler::sar_cl(const Operand& dst) {
1067 void Assembler::sbb(Register dst, const Operand& src) {
1074 void Assembler::shld(Register dst, const Operand& src) {
1082 void Assembler::shl(const Operand& dst, uint8_t imm8) {
1096 void Assembler::shl_cl(const Operand& dst) {
1103 void Assembler::shrd(Register dst, const Operand& src) {
1111 void Assembler::shr(const Operand& dst, uint8_t imm8) {
1125 void Assembler::shr_cl(const Operand& dst) {
1132 void Assembler::sub(const Operand& dst, const Immediate& x) {
1138 void Assembler::sub(Register dst, const Operand& src) {
1145 void Assembler::sub(const Operand& dst, Register src) {
1171 void Assembler::test(Register reg, const Operand& op) {
1178 void Assembler::test_b(Register reg, const Operand& op) {
1186 void Assembler::test(const Operand& op, const Immediate& imm) {
1218 void Assembler::test_b(const Operand& op, uint8_t imm8) {
1232 emit_arith(6, Operand(dst), Immediate(imm32));
1236 void Assembler::xor_(Register dst, const Operand& src) {
1243 void Assembler::xor_(const Operand& dst, Register src) {
1250 void Assembler::xor_(const Operand& dst, const Immediate& x) {
1256 void Assembler::bt(const Operand& dst, Register src) {
1264 void Assembler::bts(const Operand& dst, Register src) {
1272 void Assembler::bsr(Register dst, const Operand& src) {
1280 void Assembler::bsf(Register dst, const Operand& src) {
1437 int Assembler::CallSize(const Operand& adr) {
1438 // Call size is 1 (opcode) + adr.len_ (operand).
1443 void Assembler::call(const Operand& adr) {
1507 void Assembler::jmp(const Operand& adr) {
1619 void Assembler::fld_s(const Operand& adr) {
1626 void Assembler::fld_d(const Operand& adr) {
1633 void Assembler::fstp_s(const Operand& adr) {
1640 void Assembler::fst_s(const Operand& adr) {
1647 void Assembler::fstp_d(const Operand& adr) {
1654 void Assembler::fst_d(const Operand& adr) {
1661 void Assembler::fild_s(const Operand& adr) {
1668 void Assembler::fild_d(const Operand& adr) {
1675 void Assembler::fistp_s(const Operand& adr) {
1682 void Assembler::fisttp_s(const Operand& adr) {
1690 void Assembler::fisttp_d(const Operand& adr) {
1698 void Assembler::fist_s(const Operand& adr) {
1705 void Assembler::fistp_d(const Operand& adr) {
1799 void Assembler::fisub_s(const Operand& adr) {
1976 void Assembler::cvttss2si(Register dst, const Operand& src) {
1985 void Assembler::cvttsd2si(Register dst, const Operand& src) {
2003 void Assembler::cvtsi2sd(XMMRegister dst, const Operand& src) {
2012 void Assembler::cvtss2sd(XMMRegister dst, const Operand& src) {
2021 void Assembler::cvtsd2ss(XMMRegister dst, const Operand& src) {
2030 void Assembler::addsd(XMMRegister dst, const Operand& src) {
2039 void Assembler::mulsd(XMMRegister dst, const Operand& src) {
2048 void Assembler::subsd(XMMRegister dst, const Operand& src) {
2057 void Assembler::divsd(XMMRegister dst, const Operand& src) {
2075 void Assembler::andps(XMMRegister dst, const Operand& src) {
2083 void Assembler::orps(XMMRegister dst, const Operand& src) {
2091 void Assembler::xorps(XMMRegister dst, const Operand& src) {
2099 void Assembler::addps(XMMRegister dst, const Operand& src) {
2107 void Assembler::subps(XMMRegister dst, const Operand& src) {
2115 void Assembler::mulps(XMMRegister dst, const Operand& src) {
2123 void Assembler::divps(XMMRegister dst, const Operand& src) {
2131 void Assembler::sqrtsd(XMMRegister dst, const Operand& src) {
2158 void Assembler::ucomisd(XMMRegister dst, const Operand& src) {
2237 void Assembler::maxsd(XMMRegister dst, const Operand& src) {
2246 void Assembler::minsd(XMMRegister dst, const Operand& src) {
2283 void Assembler::movdqa(const Operand& dst, XMMRegister src) {
2292 void Assembler::movdqa(XMMRegister dst, const Operand& src) {
2301 void Assembler::movdqu(const Operand& dst, XMMRegister src ) {
2310 void Assembler::movdqu(XMMRegister dst, const Operand& src) {
2319 void Assembler::prefetch(const Operand& src, int level) {
2330 void Assembler::movsd(const Operand& dst, XMMRegister src ) {
2339 void Assembler::movsd(XMMRegister dst, const Operand& src) {
2348 void Assembler::movss(const Operand& dst, XMMRegister src ) {
2357 void Assembler::movss(XMMRegister dst, const Operand& src) {
2366 void Assembler::movd(XMMRegister dst, const Operand& src) {
2375 void Assembler::movd(const Operand& dst, XMMRegister src) {
2503 void Assembler::pextrd(const Operand& dst, XMMRegister src, int8_t offset) {
2515 void Assembler::pinsrd(XMMRegister dst, const Operand& src, int8_t offset) {
2527 void Assembler::addss(XMMRegister dst, const Operand& src) {
2536 void Assembler::subss(XMMRegister dst, const Operand& src) {
2545 void Assembler::mulss(XMMRegister dst, const Operand& src) {
2554 void Assembler::divss(XMMRegister dst, const Operand& src) {
2563 void Assembler::sqrtss(XMMRegister dst, const Operand& src) {
2572 void Assembler::ucomiss(XMMRegister dst, const Operand& src) {
2580 void Assembler::maxss(XMMRegister dst, const Operand& src) {
2589 void Assembler::minss(XMMRegister dst, const Operand& src) {
2600 const Operand& src2) {
2610 const Operand& src2) {
2620 const Operand& src2) {
2630 const Operand& src2) {
2640 const Operand& src2) {
2650 const Operand& src2) {
2659 void Assembler::bmi1(byte op, Register reg, Register vreg, const Operand& rm) {
2668 void Assembler::tzcnt(Register dst, const Operand& src) {
2678 void Assembler::lzcnt(Register dst, const Operand& src) {
2688 void Assembler::popcnt(Register dst, const Operand& src) {
2699 const Operand& rm) {
2708 void Assembler::rorx(Register dst, const Operand& src, byte imm8) {
2720 void Assembler::emit_sse_operand(XMMRegister reg, const Operand& adr) {
2824 void Assembler::emit_arith(int sel, Operand dst, const Immediate& x) {
2842 void Assembler::emit_operand(Register reg, const Operand& adr) {
2849 // Emit the rest of the encoded operand.