Lines Matching refs:Operand
119 // Implementation of Operand
121 Operand::Operand(Register base, int32_t disp) : rex_(0) {
140 Operand::Operand(Register base,
161 Operand::Operand(Register index,
172 Operand::Operand(Label* label) : rex_(0), len_(1) {
179 Operand::Operand(const Operand& operand, int32_t offset) {
180 DCHECK(operand.len_ >= 1);
181 // Operand encodes REX ModR/M [SIB] [Disp].
182 byte modrm = operand.buf_[0];
187 int base_reg = (has_sib ? operand.buf_[1] : modrm) & 0x07;
194 disp_value = *bit_cast<const int32_t*>(&operand.buf_[disp_offset]);
197 disp_value = static_cast<signed char>(operand.buf_[disp_offset]);
200 // Write new operand with same registers, but with modified displacement.
204 rex_ = operand.rex_;
221 buf_[1] = operand.buf_[1];
226 bool Operand::AddressUsesRegister(Register reg) const {
228 DCHECK((buf_[0] & 0xC0) != 0xC0); // Always a memory operand.
429 void Assembler::emit_operand(int code, const Operand& adr) {
456 // Emit the rest of the encoded operand.
466 const Operand& op,
482 // Swap reg and rm_reg and change opcode operand order.
498 // Swap reg and rm_reg and change opcode operand order.
514 const Operand& rm_reg) {
523 Operand& op) {
538 // Swap reg and rm_reg and change opcode operand order.
577 const Operand& dst,
598 emit(0x66); // Operand size override prefix.
616 const Operand& dst,
619 emit(0x66); // Operand size override prefix.
634 const Operand& dst,
680 void Assembler::shift(Operand dst, Immediate shift_amount, int subcode,
706 void Assembler::shift(Operand dst, int subcode, int size) {
714 void Assembler::bt(const Operand& dst, Register src) {
723 void Assembler::bts(const Operand& dst, Register src) {
741 void Assembler::bsrl(Register dst, const Operand& src) {
759 void Assembler::bsrq(Register dst, const Operand& src) {
777 void Assembler::bsfl(Register dst, const Operand& src) {
795 void Assembler::bsfq(Register dst, const Operand& src) {
856 void Assembler::call(const Operand& op) {
918 void Assembler::cmovq(Condition cc, Register dst, const Operand& src) {
950 void Assembler::cmovl(Condition cc, Register dst, const Operand& src) {
996 void Assembler::emit_dec(const Operand& dst, int size) {
1015 void Assembler::decb(const Operand& dst) {
1026 emitw(size.value_); // 16 bit operand, always.
1061 void Assembler::emit_imul(const Operand& src, int size) {
1078 void Assembler::emit_imul(Register dst, const Operand& src, int size) {
1102 void Assembler::emit_imul(Register dst, const Operand& src, Immediate imm,
1126 void Assembler::emit_inc(const Operand& dst, int size) {
1291 void Assembler::jmp(const Operand& src) {
1300 void Assembler::emit_lea(Register dst, const Operand& src, int size) {
1318 // In 64-bit mode, need to zero extend the operand to 8 bytes.
1337 void Assembler::movb(Register dst, const Operand& src) {
1361 void Assembler::movb(const Operand& dst, Register src) {
1374 void Assembler::movb(const Operand& dst, Immediate imm) {
1383 void Assembler::movw(Register dst, const Operand& src) {
1392 void Assembler::movw(const Operand& dst, Register src) {
1401 void Assembler::movw(const Operand& dst, Immediate imm) {
1412 void Assembler::emit_mov(Register dst, const Operand& src, int size) {
1434 void Assembler::emit_mov(const Operand& dst, Register src, int size) {
1456 void Assembler::emit_mov(const Operand& dst, Immediate value, int size) {
1488 void Assembler::movl(const Operand& dst, Label* src) {
1523 void Assembler::movsxbl(Register dst, const Operand& src) {
1532 void Assembler::movsxbq(Register dst, const Operand& src) {
1550 void Assembler::movsxwl(Register dst, const Operand& src) {
1559 void Assembler::movsxwq(Register dst, const Operand& src) {
1576 void Assembler::movsxlq(Register dst, const Operand& src) {
1584 void Assembler::emit_movzxb(Register dst, const Operand& src, int size) {
1611 void Assembler::emit_movzxw(Register dst, const Operand& src, int size) {
1642 emit(0x66); // Operand size override.
1664 void Assembler::mull(const Operand& src) {
1688 void Assembler::emit_neg(const Operand& dst, int size) {
1710 void Assembler::emit_not(const Operand& dst, int size) {
1802 void Assembler::popq(const Operand& dst) {
1823 void Assembler::pushq(const Operand& src) {
1929 void Assembler::emit_xchg(Register dst, const Operand& src, int size) {
1947 // In 64-bit mode, need to zero extend the operand to 8 bytes.
1995 void Assembler::testb(const Operand& op, Immediate mask) {
2005 void Assembler::testb(const Operand& op, Register reg) {
2052 void Assembler::emit_test(const Operand& op, Immediate mask, int size) {
2066 void Assembler::emit_test(const Operand& op, Register reg, int size) {
2111 void Assembler::fld_s(const Operand& adr) {
2119 void Assembler::fld_d(const Operand& adr) {
2127 void Assembler::fstp_s(const Operand& adr) {
2135 void Assembler::fstp_d(const Operand& adr) {
2150 void Assembler::fild_s(const Operand& adr) {
2158 void Assembler::fild_d(const Operand& adr) {
2166 void Assembler::fistp_s(const Operand& adr) {
2174 void Assembler::fisttp_s(const Operand& adr) {
2183 void Assembler::fisttp_d(const Operand& adr) {
2192 void Assembler::fist_s(const Operand& adr) {
2200 void Assembler::fistp_d(const Operand& adr) {
2283 void Assembler::fisub_s(const Operand& adr) {
2462 void Assembler::andps(XMMRegister dst, const Operand& src) {
2480 void Assembler::orps(XMMRegister dst, const Operand& src) {
2499 void Assembler::xorps(XMMRegister dst, const Operand& src) {
2518 void Assembler::addps(XMMRegister dst, const Operand& src) {
2536 void Assembler::subps(XMMRegister dst, const Operand& src) {
2554 void Assembler::mulps(XMMRegister dst, const Operand& src) {
2572 void Assembler::divps(XMMRegister dst, const Operand& src) {
2594 void Assembler::movd(XMMRegister dst, const Operand& src) {
2658 void Assembler::movdqa(const Operand& dst, XMMRegister src) {
2668 void Assembler::movdqa(XMMRegister dst, const Operand& src) {
2678 void Assembler::movdqu(const Operand& dst, XMMRegister src) {
2688 void Assembler::movdqu(XMMRegister dst, const Operand& src) {
2738 void Assembler::pinsrd(XMMRegister dst, const Operand& src, int8_t imm8) {
2751 void Assembler::movsd(const Operand& dst, XMMRegister src) {
2773 void Assembler::movsd(XMMRegister dst, const Operand& src) {
2843 void Assembler::addss(XMMRegister dst, const Operand& src) {
2863 void Assembler::subss(XMMRegister dst, const Operand& src) {
2883 void Assembler::mulss(XMMRegister dst, const Operand& src) {
2903 void Assembler::divss(XMMRegister dst, const Operand& src) {
2923 void Assembler::maxss(XMMRegister dst, const Operand& src) {
2943 void Assembler::minss(XMMRegister dst, const Operand& src) {
2963 void Assembler::sqrtss(XMMRegister dst, const Operand& src) {
2983 void Assembler::ucomiss(XMMRegister dst, const Operand& src) {
3004 void Assembler::movss(XMMRegister dst, const Operand& src) {
3015 void Assembler::movss(const Operand& src, XMMRegister dst) {
3072 void Assembler::cvttss2si(Register dst, const Operand& src) {
3094 void Assembler::cvttsd2si(Register dst, const Operand& src) {
3127 void Assembler::cvttss2siq(Register dst, const Operand& src) {
3149 void Assembler::cvttsd2siq(Register dst, const Operand& src) {
3160 void Assembler::cvtlsi2sd(XMMRegister dst, const Operand& src) {
3192 void Assembler::cvtqsi2ss(XMMRegister dst, const Operand& src) {
3214 void Assembler::cvtqsi2sd(XMMRegister dst, const Operand& src) {
3247 void Assembler::cvtss2sd(XMMRegister dst, const Operand& src) {
3269 void Assembler::cvtsd2ss(XMMRegister dst, const Operand& src) {
3312 void Assembler::addsd(XMMRegister dst, const Operand& src) {
3332 void Assembler::mulsd(XMMRegister dst, const Operand& src) {
3352 void Assembler::subsd(XMMRegister dst, const Operand& src) {
3372 void Assembler::divsd(XMMRegister dst, const Operand& src) {
3392 void Assembler::maxsd(XMMRegister dst, const Operand& src) {
3412 void Assembler::minsd(XMMRegister dst, const Operand& src) {
3464 void Assembler::sqrtsd(XMMRegister dst, const Operand& src) {
3486 void Assembler::ucomisd(XMMRegister dst, const Operand& src) {
3600 const Operand& src2) {
3620 const Operand& src2) {
3639 void Assembler::vmovd(XMMRegister dst, const Operand& src) {
3668 void Assembler::vmovq(XMMRegister dst, const Operand& src) {
3698 const Operand& src2, SIMDPrefix pp, LeadingOpcode m,
3719 const Operand& src2) {
3739 const Operand& src2) {
3757 void Assembler::vucomiss(XMMRegister dst, const Operand& src) {
3777 const Operand& src2) {
3795 void Assembler::bmi1q(byte op, Register reg, Register vreg, const Operand& rm) {
3813 void Assembler::bmi1l(byte op, Register reg, Register vreg, const Operand& rm) {
3833 void Assembler::tzcntq(Register dst, const Operand& src) {
3855 void Assembler::tzcntl(Register dst, const Operand& src) {
3877 void Assembler::lzcntq(Register dst, const Operand& src) {
3899 void Assembler::lzcntl(Register dst, const Operand& src) {
3921 void Assembler::popcntq(Register dst, const Operand& src) {
3943 void Assembler::popcntl(Register dst, const Operand& src) {
3965 const Operand& rm) {
3985 const Operand& rm) {
4006 void Assembler::rorxq(Register dst, const Operand& src, byte imm8) {
4030 void Assembler::rorxl(Register dst, const Operand& src, byte imm8) {
4042 void Assembler::emit_sse_operand(XMMRegister reg, const Operand& adr) {
4048 void Assembler::emit_sse_operand(Register reg, const Operand& adr) {
