Lines Matching refs:SseReRg
984 i->Ain.SseReRg.op = op;
985 i->Ain.SseReRg.src = re;
986 i->Ain.SseReRg.dst = rg;
1342 vex_printf("%s ", showAMD64SseOp(i->Ain.SseReRg.op));
1343 ppHRegAMD64(i->Ain.SseReRg.src);
1345 ppHRegAMD64(i->Ain.SseReRg.dst);
1372 //uu vex_printf("v%s ", showAMD64SseOp(i->Ain.SseReRg.op));
1658 if ( (i->Ain.SseReRg.op == Asse_XOR
1659 || i->Ain.SseReRg.op == Asse_CMPEQ32)
1660 && sameHReg(i->Ain.SseReRg.src, i->Ain.SseReRg.dst)) {
1665 addHRegUse(u, HRmWrite, i->Ain.SseReRg.dst);
1667 addHRegUse(u, HRmRead, i->Ain.SseReRg.src);
1668 addHRegUse(u, i->Ain.SseReRg.op == Asse_MOV
1670 i->Ain.SseReRg.dst);
1879 mapReg(m, &i->Ain.SseReRg.src);
1880 mapReg(m, &i->Ain.SseReRg.dst);
1931 if (i->Ain.SseReRg.op != Asse_MOV)
1933 *src = i->Ain.SseReRg.src;
1934 *dst = i->Ain.SseReRg.dst;
3679 rexAMode_R_enc_enc( vregEnc3210(i->Ain.SseReRg.dst),
3680 vregEnc3210(i->Ain.SseReRg.src) ));
3682 switch (i->Ain.SseReRg.op) {
3740 p = doAMode_R_enc_enc(p, vregEnc3210(i->Ain.SseReRg.dst),
3741 vregEnc3210(i->Ain.SseReRg.src) );
