Cross Reference: /external/valgrind/VEX/priv/host_amd64

Lines Matching refs:AMD64Instr_SseReRg
323    return AMD64Instr_SseReRg(Asse_MOV, src, dst);
841    addInstr(env, AMD64Instr_SseReRg(Asse_XOR, dst, dst));
850    addInstr(env, AMD64Instr_SseReRg(Asse_CMPEQ32, dst, dst));
861    addInstr(env, AMD64Instr_SseReRg(Asse_XOR, src, dst));
2654       addInstr(env, AMD64Instr_SseReRg(Asse_XOR, tmp, dst));
3005          addInstr(env, AMD64Instr_SseReRg(Asse_XOR, tmp, dst));
3007          addInstr(env, AMD64Instr_SseReRg(Asse_ANDN, tmp, dst));
3206          addInstr(env, AMD64Instr_SseReRg(Asse_CMPEQ32, arg, tmp));
3209          addInstr(env, AMD64Instr_SseReRg(Asse_OR, tmp, dst));
3223          addInstr(env, AMD64Instr_SseReRg(op, zero, tmp));
3492             addInstr(env, AMD64Instr_SseReRg(op, arg1, dst));
3495             addInstr(env, AMD64Instr_SseReRg(op, arg2, dst));
3518          addInstr(env, AMD64Instr_SseReRg(op, ereg, dst));
3847          addInstr(env, AMD64Instr_SseReRg(Asse_CMPEQ32, argHi, tmpHi));
3848          addInstr(env, AMD64Instr_SseReRg(Asse_CMPEQ32, argLo, tmpLo));
3853          addInstr(env, AMD64Instr_SseReRg(Asse_OR, tmpHi, dstHi));
3854          addInstr(env, AMD64Instr_SseReRg(Asse_OR, tmpLo, dstLo));
3873          addInstr(env, AMD64Instr_SseReRg(op, zero, tmpHi));
3874          addInstr(env, AMD64Instr_SseReRg(op, zero, tmpLo));
3969          addInstr(env, AMD64Instr_SseReRg(op, argRhi, dstHi));
3970          addInstr(env, AMD64Instr_SseReRg(op, argRlo, dstLo));
3996          addInstr(env, AMD64Instr_SseReRg(op, ereg, dstHi));
3998          addInstr(env, AMD64Instr_SseReRg(op, ereg, dstLo));
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