Lines Matching defs:rD
888 ARM64Instr* ARM64Instr_LdSt64 ( Bool isLoad, HReg rD, ARM64AMode* amode ) {
892 i->ARM64in.LdSt64.rD = rD;
896 ARM64Instr* ARM64Instr_LdSt32 ( Bool isLoad, HReg rD, ARM64AMode* amode ) {
900 i->ARM64in.LdSt32.rD = rD;
904 ARM64Instr* ARM64Instr_LdSt16 ( Bool isLoad, HReg rD, ARM64AMode* amode ) {
908 i->ARM64in.LdSt16.rD = rD;
912 ARM64Instr* ARM64Instr_LdSt8 ( Bool isLoad, HReg rD, ARM64AMode* amode ) {
916 i->ARM64in.LdSt8.rD = rD;
1051 ARM64Instr* ARM64Instr_VCvtI2F ( ARM64CvtOp how, HReg rD, HReg rS ) {
1055 i->ARM64in.VCvtI2F.rD = rD;
1059 ARM64Instr* ARM64Instr_VCvtF2I ( ARM64CvtOp how, HReg rD, HReg rS,
1064 i->ARM64in.VCvtF2I.rD = rD;
1288 ARM64Instr* ARM64Instr_VDfromX ( HReg rD, HReg rX ) {
1291 i->ARM64in.VDfromX.rD = rD;
1421 ppHRegARM64(i->ARM64in.LdSt64.rD);
1428 ppHRegARM64(i->ARM64in.LdSt64.rD);
1434 ppHRegARM64(i->ARM64in.LdSt32.rD);
1441 ppHRegARM64(i->ARM64in.LdSt32.rD);
1447 ppHRegARM64(i->ARM64in.LdSt16.rD);
1454 ppHRegARM64(i->ARM64in.LdSt16.rD);
1460 ppHRegARM64(i->ARM64in.LdSt8.rD);
1467 ppHRegARM64(i->ARM64in.LdSt8.rD);
1631 ppHRegARM64(i->ARM64in.VCvtI2F.rD);
1646 ppHRegARM64(i->ARM64in.VCvtF2I.rD);
1835 ppHRegARM64(i->ARM64in.VDfromX.rD);
1946 addHRegUse(u, HRmWrite, i->ARM64in.LdSt64.rD);
1948 addHRegUse(u, HRmRead, i->ARM64in.LdSt64.rD);
1954 addHRegUse(u, HRmWrite, i->ARM64in.LdSt32.rD);
1956 addHRegUse(u, HRmRead, i->ARM64in.LdSt32.rD);
1962 addHRegUse(u, HRmWrite, i->ARM64in.LdSt16.rD);
1964 addHRegUse(u, HRmRead, i->ARM64in.LdSt16.rD);
1970 addHRegUse(u, HRmWrite, i->ARM64in.LdSt8.rD);
1972 addHRegUse(u, HRmRead, i->ARM64in.LdSt8.rD);
2094 addHRegUse(u, HRmWrite, i->ARM64in.VCvtI2F.rD);
2098 rD);
2186 addHRegUse(u, HRmWrite, i->ARM64in.VDfromX.rD);
2270 i->ARM64in.LdSt64.rD = lookupHRegRemap(m, i->ARM64in.LdSt64.rD);
2274 i->ARM64in.LdSt32.rD = lookupHRegRemap(m, i->ARM64in.LdSt32.rD);
2278 i->ARM64in.LdSt16.rD = lookupHRegRemap(m, i->ARM64in.LdSt16.rD);
2282 i->ARM64in.LdSt8.rD = lookupHRegRemap(m, i->ARM64in.LdSt8.rD);
2339 i->ARM64in.VCvtI2F.rD = lookupHRegRemap(m, i->ARM64in.VCvtI2F.rD);
2343 i->ARM64in.VCvtF2I.rD = lookupHRegRemap(m, i->ARM64in.VCvtF2I.rD);
2426 i->ARM64in.VDfromX.rD
2427 = lookupHRegRemap(m, i->ARM64in.VDfromX.rD);
3047 rD, using the given amode for the address. */
3096 rD, using the given amode for the address. */
3145 rD, using the given amode for the address. */
3265 UInt rD = iregEnc(i->ARM64in.Arith.dst);
3274 argR->ARM64riA.I12.imm12, rN, rD
3281 X01011000, rM, X000000, rN, rD
3291 UInt rD = 31; /* XZR, we are going to dump the result */
3297 /* 1 11 10001 sh imm12 Rn Rd = SUBS Xd, Xn, #imm */
3298 /* 0 11 10001 sh imm12 Rn Rd = SUBS Wd, Wn, #imm */
3302 argR->ARM64riA.I12.imm12, rN, rD);
3305 /* 1 11 01011 00 0 Rm 000000 Rn Rd = SUBS Xd, Xn, Xm */
3306 /* 0 11 01011 00 0 Rm 000000 Rn Rd = SUBS Wd, Wn, Wm */
3309 X01011000, rM, X000000, rN, rD);
3318 UInt rD = iregEnc(i->ARM64in.Logic.dst);
3322 vassert(rD < 31);
3333 /* 1 01 100100 N immR immS Rn Rd = ORR <Xd|Sp>, Xn, #imm */
3334 /* 1 00 100100 N immR immS Rn Rd = AND <Xd|Sp>, Xn, #imm */
3335 /* 1 10 100100 N immR immS Rn Rd = EOR <Xd|Sp>, Xn, #imm */
3339 rN, rD
3349 *p++ = X_3_8_5_6_5_5(opc, X01010000, rM, X000000, rN, rD);
3358 UInt rD = 31; /* XZR, we are going to dump the result */
3363 /* 1 11 100100 N immR immS Rn Rd = ANDS Xd, Xn, #imm */
3367 rN, rD
3377 UInt rD = iregEnc(i->ARM64in.Shift.dst);
3380 vassert(rD < 31);
3392 1, 64-sh, 63-sh, rN, rD);
3395 *p++ = X_3_6_1_6_6_5_5(X110, X100110, 1, sh, 63, rN, rD);
3398 *p++ = X_3_6_1_6_6_5_5(X100, X100110, 1, sh, 63, rN, rD);
3418 *p++ = X_3_8_5_6_5_5(X100, X11010110, rM, subOpc, rN, rD);
3470 iregEnc(i->ARM64in.LdSt64.rD),
3476 iregEnc(i->ARM64in.LdSt32.rD),
3482 iregEnc(i->ARM64in.LdSt16.rD),
3488 iregEnc(i->ARM64in.LdSt8.rD),
3884 UInt rD = dregEnc(i->ARM64in.VCvtI2F.rD);
3889 *p++ = X_3_5_8_6_5_5(X000, X11110, X00100010, X000000, rN, rD);
3892 *p++ = X_3_5_8_6_5_5(X000, X11110, X01100010, X000000, rN, rD);
3895 *p++ = X_3_5_8_6_5_5(X100, X11110, X00100010, X000000, rN, rD);
3898 *p++ = X_3_5_8_6_5_5(X100, X11110, X01100010, X000000, rN, rD);
3901 *p++ = X_3_5_8_6_5_5(X000, X11110, X00100011, X000000, rN, rD);
3904 *p++ = X_3_5_8_6_5_5(X000, X11110, X01100011, X000000, rN, rD);
3907 *p++ = X_3_5_8_6_5_5(X100, X11110, X00100011, X000000, rN, rD);
3910 *p++ = X_3_5_8_6_5_5(X100, X11110, X01100011, X000000, rN, rD);
3919 sf 00,11110,0x 1 00 000,000000 n d FCVTNS Rd, Fn (round to
3920 sf 00,11110,0x 1 00 001,000000 n d FCVTNU Rd, Fn nearest)
3925 Rd is Xd when sf==1, Wd when sf==0
3929 UInt rD = iregEnc(i->ARM64in.VCvtF2I.rD);
3937 X000000, rN, rD);
3941 X000000, rN, rD);
3945 X000000, rN, rD);
3949 X000000, rN, rD);
3953 X000000, rN, rD);
3957 X000000, rN, rD);
3961 X000000, rN, rD);
3965 X000000, rN, rD);
5248 UInt dd = dregEnc(i->ARM64in.VDfromX.rD);
5315 HReg rD = i->ARM64in.VMov.dst;
5319 UInt dd = qregEnc(rD);
5325 UInt dd = dregEnc(rD);
