| /external/apache-xml/src/main/java/org/apache/xpath/operations/ |
| And.java | 15 * See the License for the specific language governing permissions and
19 * $Id: And.java 468655 2006-10-28 07:12:06Z minchau $
28 * The 'and' operation expression executer.
30 public class And extends Operation
35 * AND two expressions and return the boolean result. Override
|
| /external/easymock/src/org/easymock/internal/matchers/ |
| And.java | 13 * See the License for the specific language governing permissions and
24 public class And implements IArgumentMatcher, Serializable {
30 public And(List<IArgumentMatcher> matchers) {
44 buffer.append("and(");
|
| /external/mockito/src/org/mockito/internal/matchers/ |
| And.java | 17 public class And extends ArgumentMatcher implements Serializable {
22 public And(List<Matcher> matchers) {
36 description.appendText("and(");
|
| /external/clang/include/clang/Basic/ |
| OperatorPrecedence.h | 11 /// \brief Defines and computes precedence levels for binary/ternary operators.
36 And = 8, // &
|
| /external/clang/include/clang/Analysis/Analyses/ |
| ThreadSafetyLogical.h | 26 And,
69 class And : public BinOp {
71 And(LExpr *LHS, LExpr *RHS) : BinOp(LHS, RHS, LExpr::And) {}
73 static bool classof(const LExpr *E) { return E->kind() == LExpr::And; }
|
| /external/v8/src/arm/ |
| macro-assembler-arm.cc | 266 void MacroAssembler::And(Register dst, Register src1, const Operand& src2,
429 // The CPU supports fast immediate values, and this root will never
536 // only set during incremental collection, and then it's also guaranteed that
605 // catch stores of smis and stores into the young generation.
669 // Store pointer to buffer and increment buffer top.
709 // Push and pop all registers that can hold pointers.
873 // Compare and move FPSCR flags to the normal condition flags.
880 // Compare and move FPSCR flags to the normal condition flags.
888 // Compare and move FPSCR flags to the normal condition flags.
895 // Compare and move FPSCR flags to the normal condition flags
[all...] |
| /art/test/427-bitwise/src/ |
| Main.java | 13 * See the License for the specific language governing permissions and
45 expectEquals(1, $opt$And(5, 3));
46 expectEquals(0, $opt$And(0, 0));
47 expectEquals(0, $opt$And(0, 3));
48 expectEquals(0, $opt$And(3, 0));
49 expectEquals(1, $opt$And(1, -3));
50 expectEquals(-12, $opt$And(-12, -3));
66 expectEquals(1L, $opt$And(5L, 3L));
67 expectEquals(0L, $opt$And(0L, 0L));
68 expectEquals(0L, $opt$And(0L, 3L))
[all...] |
| /external/llvm/include/llvm/ADT/ |
| APSInt.h | 238 APSInt LLVM_ATTRIBUTE_UNUSED_RESULT And(const APSInt& RHS) const {
275 /// with the given bit width and signedness.
282 /// with the given bit width and signedness.
305 // We have a signedness mismatch. Check for negative values and do an
|
| /external/llvm/include/llvm/MC/ |
| MCExpr.h | 39 SymbolRef, ///< References to labels and assigned expressions.
411 And, ///< Bitwise and.
418 LAnd, ///< Logical and.
454 return create(And, LHS, RHS, Ctx);
549 /// MCExprs are bump pointer allocated and not destructed.
|
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineShifts.cpp | 10 // This file implements the visitShl, visitLShr, and visitAShr functions.
32 // Try to fold constant and into select arguments.
42 // X shift (A srem B) -> X shift (A and B-1) iff B is a power of 2.
48 // demand the sign bit (and many others) here??
110 case Instruction::And:
125 // We can always turn shl(c)+shr(c) -> and(c2).
130 // We can turn shl(c1)+shr(c2) -> shl(c3)+and(c4), but it isn't
131 // profitable unless we know the and'd out bits are already zero.
150 // We can always turn lshr(c)+shl(c) -> and(c2).
155 // We can always turn lshr(c1)+shl(c2) -> lshr(c3)+and(c4), but it isn'
[all...] |
| InstCombineSimplifyDemanded.cpp | 28 /// constant and return true.
70 /// true if it made any change and false otherwise.
86 /// downstream. Consequently, depending on the mask and V, it may be possible
88 /// function does the replacement and returns true. In all other cases, it
89 /// returns false after analyzing the expression and setting KnownOne and known
93 /// the expression. KnownOne and KnownZero always follow the invariant that
94 /// KnownOne & KnownZero == 0. That is, a bit can't be both 1 and 0. Note that
95 /// the bits in KnownOne and KnownZero may only be accurate for those bits set
97 /// and KnownOne must all be the same
[all...] |
| InstCombineSelect.cpp | 85 case Instruction::And:
112 case Instruction::And:
119 /// Here we have (select c, TI, FI), and we know that TI and FI
120 /// have the same opcode and only one use each. Try to simplify this.
131 // type if the vector width remains the same (and matches the condition).
227 // between 0, 1 and -1.
262 // between 0, 1 and -1.
286 /// (select (icmp eq (and X, C1), 0), Y, (or Y, C2))
288 /// (or (shl (and X, C1), C3), y
[all...] |
| InstCombineAndOrXor.cpp | 10 // This file implements the visitAnd, visitOr, and visitXor functions.
62 // Not expecting FCMP_FALSE and FCMP_TRUE;
67 /// This is the complement of getICmpCode, which turns an opcode and two
79 /// This is the complement of getFCmpCode, which turns an opcode and two
115 if (Op != Instruction::And && Op != Instruction::Or &&
146 if (Op == Instruction::And)
158 /// the Op parameter is 'OP', OpRHS is 'C1', and AndRHS is 'C2'. Op is
173 Value *And = Builder->CreateAnd(X, AndRHS);
174 And->takeName(Op);
175 return BinaryOperator::CreateXor(And, Together)
[all...] |
| /external/protobuf/python/ |
| mox.py | 14 # See the License for the specific language governing permissions and
25 called on it, with what parameters, what they should return, and in
54 # Inject mock object and run test
211 This will replace a class or module with a MockObject, and everything else
223 if type(attr_to_replace) in self._USE_MOCK_OBJECT and not use_mock_anything:
296 """Create a new mock method call and return it.
317 return (isinstance(rhs, MockAnything) and
318 self._replay_mode == rhs._replay_mode and
342 if (len(self._expected_calls_queue) == 1 and
343 isinstance(self._expected_calls_queue[0], MultipleTimesGroup) and
[all...] |
| /external/regex-re2/re2/ |
| prefilter.cc | 23 if (op_ == AND || op_ == OR)
41 // Simplify if the node is an empty Or or And.
43 if (op_ != AND && op_ != OR) {
47 // Nothing left in the AND/OR.
49 if (op_ == AND)
50 op_ = ALL; // AND of nothing is true
68 // Combines two Prefilters together to create an "op" (AND or OR).
84 // ALL AND b = b
87 // NONE AND b = NONE
89 // ALL and NONE are smallest opcodes
[all...] |
| /external/chromium-trace/catapult/telemetry/third_party/mox3/mox3/ |
| mox.py | 12 # See the License for the specific language governing permissions and
16 # The file was modified by quermit@gmail.com and dawid.fatyga@gmail.com
23 called on it, with what parameters, what they should return, and in
57 # Inject mock object and run test
173 return ("Attribute '%s' is private and should not be available"
300 This will replace a class or module with a MockObject, and everything
328 if type_check and not use_mock_anything:
345 during the record phase, new mock instances will be created, and
480 """Create a new mock method call and return it.
512 return (isinstance(rhs, MockAnything) and
[all...] |
| /external/chromium-trace/catapult/third_party/mox3/mox3/ |
| mox.py | 12 # See the License for the specific language governing permissions and
16 # The file was modified by quermit@gmail.com and dawid.fatyga@gmail.com
23 called on it, with what parameters, what they should return, and in
57 # Inject mock object and run test
173 return ("Attribute '%s' is private and should not be available"
300 This will replace a class or module with a MockObject, and everything
328 if type_check and not use_mock_anything:
345 during the record phase, new mock instances will be created, and
480 """Create a new mock method call and return it.
512 return (isinstance(rhs, MockAnything) and
[all...] |
| /external/opencv3/3rdparty/jinja2/ |
| nodes.py | 8 It also provides some node tree helper functions like `in_lineno` and
9 `get_nodes` used by the parser and translator in order to normalize
10 python and jinja nodes.
60 """A metaclass for nodes that handles the field and attribute
61 inheritance. fields and attributes from the parent class are
116 All nodes have fields and attributes. Fields may be other nodes, lists,
119 two attributes: `lineno` (the line number of the node) and `environment`.
138 len(self.fields) != 1 and 's' or ''
149 """This method iterates over all fields that are defined and yields
157 (exclude is not None and name not in exclude) or
[all...] |
| /prebuilts/gdb/darwin-x86/lib/python2.7/compiler/ |
| ast.py | 68 class And(Node):
82 return "And(%s)" % (repr(self.nodes),)
[all...] |
| /prebuilts/gdb/linux-x86/lib/python2.7/compiler/ |
| ast.py | 68 class And(Node):
82 return "And(%s)" % (repr(self.nodes),)
[all...] |
| /prebuilts/python/darwin-x86/2.7.5/lib/python2.7/compiler/ |
| ast.py | 68 class And(Node):
82 return "And(%s)" % (repr(self.nodes),)
[all...] |
| /prebuilts/python/linux-x86/2.7.5/lib/python2.7/compiler/ |
| ast.py | 68 class And(Node):
82 return "And(%s)" % (repr(self.nodes),)
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelDAGToDAG.cpp | 321 // calculation into the LOAD and STORE instructions.
470 // has a separate operand for the offset and width, the scalar version packs
471 // the width and offset into a single operand. Try to move to the scalar
504 case ISD::AND:
782 // On Southern Islands instruction with a negative base value and an offset
827 // operations can share the zero base address register, and enables merging
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelDAGToDAG.cpp | 115 // Used in Clr and Set bit immediate memops.
125 // 16 bit mask represents. Used in Clr and Set bit immediate memops.
131 // 8 bit mask represents. Used in Clr and Set bit immediate memops.
517 // and must have correct alignment properties.
558 // and it differs for POST_ST* for instance.
628 // Handle sign_extend and sextload.
765 // We want to preserve all the lower 8-bits and, not just 1 LSB bit.
789 SDNode *And = CurDAG->getMachineNode(Hexagon::A2_andp, dl, MVT::i64,
794 SDValue(And,0), SubR);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | 308 // This user is already selected. Count it as a legitimate use and
324 // Those instruction won't match in ISEL, for now, and would
333 // used to indicate SP offsets for argument passing and
355 // ... otherwise, count this and move on.
390 /// \brief Address-mode matching performs shift-of-and to and-of-shift
416 case X86ISD::AND:
422 case ISD::AND:
464 /// load's chain operand and move load below the call's chain operand.
495 /// Return true if call address is a load and it can b
[all...] |
