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      1 /*
      2  * Copyright (C) 2011 The Android Open Source Project
      3  *
      4  * Licensed under the Apache License, Version 2.0 (the "License");
      5  * you may not use this file except in compliance with the License.
      6  * You may obtain a copy of the License at
      7  *
      8  *      http://www.apache.org/licenses/LICENSE-2.0
      9  *
     10  * Unless required by applicable law or agreed to in writing, software
     11  * distributed under the License is distributed on an "AS IS" BASIS,
     12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
     13  * See the License for the specific language governing permissions and
     14  * limitations under the License.
     15  */
     16 
     17 #include "base/logging.h"
     18 #include "calling_convention_arm.h"
     19 #include "handle_scope-inl.h"
     20 #include "utils/arm/managed_register_arm.h"
     21 
     22 namespace art {
     23 namespace arm {
     24 
     25 // Used by hard float.
     26 static const Register kHFCoreArgumentRegisters[] = {
     27   R0, R1, R2, R3
     28 };
     29 
     30 static const SRegister kHFSArgumentRegisters[] = {
     31   S0, S1, S2, S3, S4, S5, S6, S7, S8, S9, S10, S11, S12, S13, S14, S15
     32 };
     33 
     34 static const SRegister kHFSCalleeSaveRegisters[] = {
     35   S16, S17, S18, S19, S20, S21, S22, S23, S24, S25, S26, S27, S28, S29, S30, S31
     36 };
     37 
     38 static const DRegister kHFDArgumentRegisters[] = {
     39   D0, D1, D2, D3, D4, D5, D6, D7
     40 };
     41 
     42 static_assert(arraysize(kHFDArgumentRegisters) * 2 == arraysize(kHFSArgumentRegisters),
     43     "ks d argument registers mismatch");
     44 
     45 // Calling convention
     46 
     47 ManagedRegister ArmManagedRuntimeCallingConvention::InterproceduralScratchRegister() {
     48   return ArmManagedRegister::FromCoreRegister(IP);  // R12
     49 }
     50 
     51 ManagedRegister ArmJniCallingConvention::InterproceduralScratchRegister() {
     52   return ArmManagedRegister::FromCoreRegister(IP);  // R12
     53 }
     54 
     55 ManagedRegister ArmManagedRuntimeCallingConvention::ReturnRegister() {
     56   if (kArm32QuickCodeUseSoftFloat) {
     57     switch (GetShorty()[0]) {
     58     case 'V':
     59       return ArmManagedRegister::NoRegister();
     60     case 'D':
     61     case 'J':
     62       return ArmManagedRegister::FromRegisterPair(R0_R1);
     63     default:
     64       return ArmManagedRegister::FromCoreRegister(R0);
     65     }
     66   } else {
     67     switch (GetShorty()[0]) {
     68     case 'V':
     69       return ArmManagedRegister::NoRegister();
     70     case 'D':
     71       return ArmManagedRegister::FromDRegister(D0);
     72     case 'F':
     73       return ArmManagedRegister::FromSRegister(S0);
     74     case 'J':
     75       return ArmManagedRegister::FromRegisterPair(R0_R1);
     76     default:
     77       return ArmManagedRegister::FromCoreRegister(R0);
     78     }
     79   }
     80 }
     81 
     82 ManagedRegister ArmJniCallingConvention::ReturnRegister() {
     83   switch (GetShorty()[0]) {
     84   case 'V':
     85     return ArmManagedRegister::NoRegister();
     86   case 'D':
     87   case 'J':
     88     return ArmManagedRegister::FromRegisterPair(R0_R1);
     89   default:
     90     return ArmManagedRegister::FromCoreRegister(R0);
     91   }
     92 }
     93 
     94 ManagedRegister ArmJniCallingConvention::IntReturnRegister() {
     95   return ArmManagedRegister::FromCoreRegister(R0);
     96 }
     97 
     98 // Managed runtime calling convention
     99 
    100 ManagedRegister ArmManagedRuntimeCallingConvention::MethodRegister() {
    101   return ArmManagedRegister::FromCoreRegister(R0);
    102 }
    103 
    104 bool ArmManagedRuntimeCallingConvention::IsCurrentParamInRegister() {
    105   return false;  // Everything moved to stack on entry.
    106 }
    107 
    108 bool ArmManagedRuntimeCallingConvention::IsCurrentParamOnStack() {
    109   return true;
    110 }
    111 
    112 ManagedRegister ArmManagedRuntimeCallingConvention::CurrentParamRegister() {
    113   LOG(FATAL) << "Should not reach here";
    114   return ManagedRegister::NoRegister();
    115 }
    116 
    117 FrameOffset ArmManagedRuntimeCallingConvention::CurrentParamStackOffset() {
    118   CHECK(IsCurrentParamOnStack());
    119   FrameOffset result =
    120       FrameOffset(displacement_.Int32Value() +        // displacement
    121                   kFramePointerSize +                 // Method*
    122                   (itr_slots_ * kFramePointerSize));  // offset into in args
    123   return result;
    124 }
    125 
    126 const ManagedRegisterEntrySpills& ArmManagedRuntimeCallingConvention::EntrySpills() {
    127   // We spill the argument registers on ARM to free them up for scratch use, we then assume
    128   // all arguments are on the stack.
    129   if (kArm32QuickCodeUseSoftFloat) {
    130     if (entry_spills_.size() == 0) {
    131       size_t num_spills = NumArgs() + NumLongOrDoubleArgs();
    132       if (num_spills > 0) {
    133         entry_spills_.push_back(ArmManagedRegister::FromCoreRegister(R1));
    134         if (num_spills > 1) {
    135           entry_spills_.push_back(ArmManagedRegister::FromCoreRegister(R2));
    136           if (num_spills > 2) {
    137             entry_spills_.push_back(ArmManagedRegister::FromCoreRegister(R3));
    138           }
    139         }
    140       }
    141     }
    142   } else {
    143     if ((entry_spills_.size() == 0) && (NumArgs() > 0)) {
    144       uint32_t gpr_index = 1;  // R0 ~ R3. Reserve r0 for ArtMethod*.
    145       uint32_t fpr_index = 0;  // S0 ~ S15.
    146       uint32_t fpr_double_index = 0;  // D0 ~ D7.
    147 
    148       ResetIterator(FrameOffset(0));
    149       while (HasNext()) {
    150         if (IsCurrentParamAFloatOrDouble()) {
    151           if (IsCurrentParamADouble()) {  // Double.
    152             // Double should not overlap with float.
    153             fpr_double_index = (std::max(fpr_double_index * 2, RoundUp(fpr_index, 2))) / 2;
    154             if (fpr_double_index < arraysize(kHFDArgumentRegisters)) {
    155               entry_spills_.push_back(
    156                   ArmManagedRegister::FromDRegister(kHFDArgumentRegisters[fpr_double_index++]));
    157             } else {
    158               entry_spills_.push_back(ManagedRegister::NoRegister(), 8);
    159             }
    160           } else {  // Float.
    161             // Float should not overlap with double.
    162             if (fpr_index % 2 == 0) {
    163               fpr_index = std::max(fpr_double_index * 2, fpr_index);
    164             }
    165             if (fpr_index < arraysize(kHFSArgumentRegisters)) {
    166               entry_spills_.push_back(
    167                   ArmManagedRegister::FromSRegister(kHFSArgumentRegisters[fpr_index++]));
    168             } else {
    169               entry_spills_.push_back(ManagedRegister::NoRegister(), 4);
    170             }
    171           }
    172         } else {
    173           // FIXME: Pointer this returns as both reference and long.
    174           if (IsCurrentParamALong() && !IsCurrentParamAReference()) {  // Long.
    175             if (gpr_index < arraysize(kHFCoreArgumentRegisters) - 1) {
    176               // Skip R1, and use R2_R3 if the long is the first parameter.
    177               if (gpr_index == 1) {
    178                 gpr_index++;
    179               }
    180             }
    181 
    182             // If it spans register and memory, we must use the value in memory.
    183             if (gpr_index < arraysize(kHFCoreArgumentRegisters) - 1) {
    184               entry_spills_.push_back(
    185                   ArmManagedRegister::FromCoreRegister(kHFCoreArgumentRegisters[gpr_index++]));
    186             } else if (gpr_index == arraysize(kHFCoreArgumentRegisters) - 1) {
    187               gpr_index++;
    188               entry_spills_.push_back(ManagedRegister::NoRegister(), 4);
    189             } else {
    190               entry_spills_.push_back(ManagedRegister::NoRegister(), 4);
    191             }
    192           }
    193           // High part of long or 32-bit argument.
    194           if (gpr_index < arraysize(kHFCoreArgumentRegisters)) {
    195             entry_spills_.push_back(
    196                 ArmManagedRegister::FromCoreRegister(kHFCoreArgumentRegisters[gpr_index++]));
    197           } else {
    198             entry_spills_.push_back(ManagedRegister::NoRegister(), 4);
    199           }
    200         }
    201         Next();
    202       }
    203     }
    204   }
    205   return entry_spills_;
    206 }
    207 // JNI calling convention
    208 
    209 ArmJniCallingConvention::ArmJniCallingConvention(bool is_static, bool is_synchronized,
    210                                                  const char* shorty)
    211     : JniCallingConvention(is_static, is_synchronized, shorty, kFramePointerSize) {
    212   // Compute padding to ensure longs and doubles are not split in AAPCS. Ignore the 'this' jobject
    213   // or jclass for static methods and the JNIEnv. We start at the aligned register r2.
    214   size_t padding = 0;
    215   for (size_t cur_arg = IsStatic() ? 0 : 1, cur_reg = 2; cur_arg < NumArgs(); cur_arg++) {
    216     if (IsParamALongOrDouble(cur_arg)) {
    217       if ((cur_reg & 1) != 0) {
    218         padding += 4;
    219         cur_reg++;  // additional bump to ensure alignment
    220       }
    221       cur_reg++;  // additional bump to skip extra long word
    222     }
    223     cur_reg++;  // bump the iterator for every argument
    224   }
    225   padding_ = padding;
    226 
    227   callee_save_regs_.push_back(ArmManagedRegister::FromCoreRegister(R5));
    228   callee_save_regs_.push_back(ArmManagedRegister::FromCoreRegister(R6));
    229   callee_save_regs_.push_back(ArmManagedRegister::FromCoreRegister(R7));
    230   callee_save_regs_.push_back(ArmManagedRegister::FromCoreRegister(R8));
    231   callee_save_regs_.push_back(ArmManagedRegister::FromCoreRegister(R10));
    232   callee_save_regs_.push_back(ArmManagedRegister::FromCoreRegister(R11));
    233 
    234   for (size_t i = 0; i < arraysize(kHFSCalleeSaveRegisters); ++i) {
    235     callee_save_regs_.push_back(ArmManagedRegister::FromSRegister(kHFSCalleeSaveRegisters[i]));
    236   }
    237 }
    238 
    239 uint32_t ArmJniCallingConvention::CoreSpillMask() const {
    240   // Compute spill mask to agree with callee saves initialized in the constructor
    241   uint32_t result = 0;
    242   result = 1 << R5 | 1 << R6 | 1 << R7 | 1 << R8 | 1 << R10 | 1 << R11 | 1 << LR;
    243   return result;
    244 }
    245 
    246 uint32_t ArmJniCallingConvention::FpSpillMask() const {
    247   uint32_t result = 0;
    248   for (size_t i = 0; i < arraysize(kHFSCalleeSaveRegisters); ++i) {
    249     result |= (1 << kHFSCalleeSaveRegisters[i]);
    250   }
    251   return result;
    252 }
    253 
    254 ManagedRegister ArmJniCallingConvention::ReturnScratchRegister() const {
    255   return ArmManagedRegister::FromCoreRegister(R2);
    256 }
    257 
    258 size_t ArmJniCallingConvention::FrameSize() {
    259   // Method*, LR and callee save area size, local reference segment state
    260   size_t frame_data_size = kArmPointerSize + (2 + CalleeSaveRegisters().size()) * kFramePointerSize;
    261   // References plus 2 words for HandleScope header
    262   size_t handle_scope_size = HandleScope::SizeOf(kFramePointerSize, ReferenceCount());
    263   // Plus return value spill area size
    264   return RoundUp(frame_data_size + handle_scope_size + SizeOfReturnValue(), kStackAlignment);
    265 }
    266 
    267 size_t ArmJniCallingConvention::OutArgSize() {
    268   return RoundUp(NumberOfOutgoingStackArgs() * kFramePointerSize + padding_,
    269                  kStackAlignment);
    270 }
    271 
    272 // JniCallingConvention ABI follows AAPCS where longs and doubles must occur
    273 // in even register numbers and stack slots
    274 void ArmJniCallingConvention::Next() {
    275   JniCallingConvention::Next();
    276   size_t arg_pos = itr_args_ - NumberOfExtraArgumentsForJni();
    277   if ((itr_args_ >= 2) &&
    278       (arg_pos < NumArgs()) &&
    279       IsParamALongOrDouble(arg_pos)) {
    280     // itr_slots_ needs to be an even number, according to AAPCS.
    281     if ((itr_slots_ & 0x1u) != 0) {
    282       itr_slots_++;
    283     }
    284   }
    285 }
    286 
    287 bool ArmJniCallingConvention::IsCurrentParamInRegister() {
    288   return itr_slots_ < 4;
    289 }
    290 
    291 bool ArmJniCallingConvention::IsCurrentParamOnStack() {
    292   return !IsCurrentParamInRegister();
    293 }
    294 
    295 static const Register kJniArgumentRegisters[] = {
    296   R0, R1, R2, R3
    297 };
    298 ManagedRegister ArmJniCallingConvention::CurrentParamRegister() {
    299   CHECK_LT(itr_slots_, 4u);
    300   int arg_pos = itr_args_ - NumberOfExtraArgumentsForJni();
    301   if ((itr_args_ >= 2) && IsParamALongOrDouble(arg_pos)) {
    302     CHECK_EQ(itr_slots_, 2u);
    303     return ArmManagedRegister::FromRegisterPair(R2_R3);
    304   } else {
    305     return
    306       ArmManagedRegister::FromCoreRegister(kJniArgumentRegisters[itr_slots_]);
    307   }
    308 }
    309 
    310 FrameOffset ArmJniCallingConvention::CurrentParamStackOffset() {
    311   CHECK_GE(itr_slots_, 4u);
    312   size_t offset = displacement_.Int32Value() - OutArgSize() + ((itr_slots_ - 4) * kFramePointerSize);
    313   CHECK_LT(offset, OutArgSize());
    314   return FrameOffset(offset);
    315 }
    316 
    317 size_t ArmJniCallingConvention::NumberOfOutgoingStackArgs() {
    318   size_t static_args = IsStatic() ? 1 : 0;  // count jclass
    319   // regular argument parameters and this
    320   size_t param_args = NumArgs() + NumLongOrDoubleArgs();
    321   // count JNIEnv* less arguments in registers
    322   return static_args + param_args + 1 - 4;
    323 }
    324 
    325 }  // namespace arm
    326 }  // namespace art
    327