| /external/mesa3d/src/mesa/drivers/dri/radeon/ |
| radeon_state_init.c | 423 uint32_t base_reg; local
435 case 1: base_reg = RADEON_PP_CUBIC_OFFSET_T1_0; break;
436 case 2: base_reg = RADEON_PP_CUBIC_OFFSET_T2_0; break;
438 case 0: base_reg = RADEON_PP_CUBIC_OFFSET_T0_0; break;
444 OUT_BATCH(CP_PACKET0(base_reg + (4 * j), 0));
[all...] |
| /external/v8/test/unittests/compiler/ia32/ |
| instruction-selector-ia32-unittest.cc | 344 Node* base_reg; // opaque value to generate base as register member in class:v8::internal::compiler::AddressingModeUnitTest
356 base_reg = m->Parameter(0);
368 Node* base = base_reg;
375 Node* base = base_reg;
382 Node* base = base_reg;
392 Node* base = base_reg;
401 Node* base = base_reg;
412 Node* base = base_reg;
|
| /external/v8/src/x64/ |
| disasm-x64.cc | 346 int base_reg(int low_bits) { return low_bits | ((rex_ & 0x01) << 3); } function in class:disasm::DisassemblerX64
[all...] |
| code-stubs-x64.cc | 5075 Register base_reg = r15; local
[all...] |
| /toolchain/binutils/binutils-2.25/opcodes/ |
| metag-dis.c | 472 const char *base_reg; local
481 base_reg = lookup_reg_name (base_unit, base_no);
491 snprintf (buf, buf_size, "[%s]", base_reg);
498 snprintf (buf, buf_size, "[%s++]", base_reg);
500 snprintf (buf, buf_size, "[++%s]", base_reg);
507 snprintf (buf, buf_size, "[%s--]", base_reg);
509 snprintf (buf, buf_size, "[--%s]", base_reg);
519 snprintf (buf, buf_size, "[%s+#%d++]", base_reg, offset);
521 snprintf (buf, buf_size, "[%s++#%d]", base_reg, offset);
524 snprintf (buf, buf_size, "[%s+#%d]", base_reg, offset)
552 const char *base_reg; local
582 const char *base_reg; local
598 const char *base_reg; local
614 const char *base_reg; local
909 const char *base_reg; local
2330 const char *base_reg = "?"; local
[all...] |
| /art/compiler/optimizing/ |
| code_generator_arm.cc | 5265 Register base_reg = locations->InAt(0).AsRegister<Register>(); local
6353 Register base_reg = GetInvokeStaticOrDirectExtraParameter(invoke, local
[all...] |
| code_generator_x86.cc | 4349 Register base_reg = GetInvokeStaticOrDirectExtraParameter(invoke, local
6046 Register base_reg = locations->InAt(0).AsRegister<Register>(); local
[all...] |
| code_generator_x86_64.cc | 6484 CpuRegister base_reg = locations->GetTemp(1).AsRegister<CpuRegister>(); local
[all...] |
| /toolchain/binutils/binutils-2.25/gas/config/ |
| tc-metag.c | 186 const metag_reg *base_reg; member in struct:__anon74076
736 if (regs[0]->unit != addr->base_reg->unit)
768 addr->base_reg = regs[0];
1063 (regs[0]->unit == addr.base_reg->unit ||
1064 (size == 8 && is_unit_pair (regs[0], addr.base_reg))))
1087 if (!is_short_unit (addr.base_reg->unit))
1093 insn->bits |= ((addr.base_reg->no << 14) |
1094 ((addr.base_reg->unit & SHORT_UNIT_MASK) << 5));
1188 if (!is_short_unit (addr.base_reg->unit))
1194 if (addr.base_reg->no > 1
[all...] |
| tc-tic6x.c | 1143 tic6x_register base_reg; member in struct:__anon74136
1425 tic6x_register base_reg; local
[all...] |
| tc-i386.c | 311 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
313 const reg_entry *base_reg; member in struct:_i386_insn
[all...] |
| tc-ia64.c | 4618 int ch, base_reg = 0; local
[all...] |
| tc-arm.c | 1748 int base_reg; local
1893 mask >>= base_reg; local
1951 int base_reg = -1; local
8501 int base_reg = inst.operands[0].reg; local
[all...] |
