1 /****************************************************************************** 2 * 3 * Copyright (C) 1999-2012 Broadcom Corporation 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at: 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 ******************************************************************************/ 18 19 /****************************************************************************** 20 * 21 * This file contains function of the HCIC unit to format and send HCI 22 * commands. 23 * 24 ******************************************************************************/ 25 26 #include "bt_target.h" 27 #include "bt_common.h" 28 #include "hcidefs.h" 29 #include "hcimsgs.h" 30 #include "hcidefs.h" 31 #include "btu.h" 32 33 #include <stddef.h> 34 #include <string.h> 35 36 #if (defined BLE_INCLUDED) && (BLE_INCLUDED == TRUE) 37 38 BOOLEAN btsnd_hcic_ble_set_local_used_feat (UINT8 feat_set[8]) 39 { 40 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 41 UINT8 *pp = (UINT8 *)(p + 1); 42 43 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_SET_USED_FEAT_CMD; 44 p->offset = 0; 45 46 UINT16_TO_STREAM (pp, HCI_BLE_WRITE_LOCAL_SPT_FEAT); 47 ARRAY_TO_STREAM (pp, feat_set, HCIC_PARAM_SIZE_SET_USED_FEAT_CMD); 48 49 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 50 return (TRUE); 51 } 52 53 BOOLEAN btsnd_hcic_ble_set_random_addr (BD_ADDR random_bda) 54 { 55 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 56 UINT8 *pp = (UINT8 *)(p + 1); 57 58 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_RANDOM_ADDR_CMD; 59 p->offset = 0; 60 61 UINT16_TO_STREAM (pp, HCI_BLE_WRITE_RANDOM_ADDR); 62 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_WRITE_RANDOM_ADDR_CMD); 63 64 BDADDR_TO_STREAM (pp, random_bda); 65 66 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 67 return (TRUE); 68 } 69 70 BOOLEAN btsnd_hcic_ble_write_adv_params (UINT16 adv_int_min, UINT16 adv_int_max, 71 UINT8 adv_type, UINT8 addr_type_own, 72 UINT8 addr_type_dir, BD_ADDR direct_bda, 73 UINT8 channel_map, UINT8 adv_filter_policy) 74 { 75 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 76 UINT8 *pp = (UINT8 *)(p + 1); 77 78 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_WRITE_ADV_PARAMS ; 79 p->offset = 0; 80 81 UINT16_TO_STREAM (pp, HCI_BLE_WRITE_ADV_PARAMS); 82 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_BLE_WRITE_ADV_PARAMS ); 83 84 UINT16_TO_STREAM (pp, adv_int_min); 85 UINT16_TO_STREAM (pp, adv_int_max); 86 UINT8_TO_STREAM (pp, adv_type); 87 UINT8_TO_STREAM (pp, addr_type_own); 88 UINT8_TO_STREAM (pp, addr_type_dir); 89 BDADDR_TO_STREAM (pp, direct_bda); 90 UINT8_TO_STREAM (pp, channel_map); 91 UINT8_TO_STREAM (pp, adv_filter_policy); 92 93 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 94 return (TRUE); 95 } 96 BOOLEAN btsnd_hcic_ble_read_adv_chnl_tx_power (void) 97 { 98 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 99 UINT8 *pp = (UINT8 *)(p + 1); 100 101 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_READ_CMD; 102 p->offset = 0; 103 104 UINT16_TO_STREAM (pp, HCI_BLE_READ_ADV_CHNL_TX_POWER); 105 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_READ_CMD); 106 107 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 108 return (TRUE); 109 110 } 111 112 BOOLEAN btsnd_hcic_ble_set_adv_data (UINT8 data_len, UINT8 *p_data) 113 { 114 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 115 UINT8 *pp = (UINT8 *)(p + 1); 116 117 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_WRITE_ADV_DATA + 1; 118 p->offset = 0; 119 120 UINT16_TO_STREAM (pp, HCI_BLE_WRITE_ADV_DATA); 121 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_BLE_WRITE_ADV_DATA + 1); 122 123 memset(pp, 0, HCIC_PARAM_SIZE_BLE_WRITE_ADV_DATA); 124 125 if (p_data != NULL && data_len > 0) 126 { 127 if (data_len > HCIC_PARAM_SIZE_BLE_WRITE_ADV_DATA) 128 data_len = HCIC_PARAM_SIZE_BLE_WRITE_ADV_DATA; 129 130 UINT8_TO_STREAM (pp, data_len); 131 132 ARRAY_TO_STREAM (pp, p_data, data_len); 133 } 134 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 135 136 return (TRUE); 137 } 138 BOOLEAN btsnd_hcic_ble_set_scan_rsp_data (UINT8 data_len, UINT8 *p_scan_rsp) 139 { 140 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 141 UINT8 *pp = (UINT8 *)(p + 1); 142 143 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_WRITE_SCAN_RSP + 1; 144 p->offset = 0; 145 146 UINT16_TO_STREAM (pp, HCI_BLE_WRITE_SCAN_RSP_DATA); 147 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_BLE_WRITE_SCAN_RSP + 1); 148 149 memset(pp, 0, HCIC_PARAM_SIZE_BLE_WRITE_SCAN_RSP); 150 151 if (p_scan_rsp != NULL && data_len > 0) 152 { 153 154 if (data_len > HCIC_PARAM_SIZE_BLE_WRITE_SCAN_RSP ) 155 data_len = HCIC_PARAM_SIZE_BLE_WRITE_SCAN_RSP; 156 157 UINT8_TO_STREAM (pp, data_len); 158 159 ARRAY_TO_STREAM (pp, p_scan_rsp, data_len); 160 } 161 162 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 163 164 return (TRUE); 165 } 166 167 BOOLEAN btsnd_hcic_ble_set_adv_enable (UINT8 adv_enable) 168 { 169 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 170 UINT8 *pp = (UINT8 *)(p + 1); 171 172 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_ADV_ENABLE; 173 p->offset = 0; 174 175 UINT16_TO_STREAM (pp, HCI_BLE_WRITE_ADV_ENABLE); 176 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_WRITE_ADV_ENABLE); 177 178 UINT8_TO_STREAM (pp, adv_enable); 179 180 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 181 return (TRUE); 182 } 183 BOOLEAN btsnd_hcic_ble_set_scan_params (UINT8 scan_type, 184 UINT16 scan_int, UINT16 scan_win, 185 UINT8 addr_type_own, UINT8 scan_filter_policy) 186 { 187 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 188 UINT8 *pp = (UINT8 *)(p + 1); 189 190 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_WRITE_SCAN_PARAM; 191 p->offset = 0; 192 193 UINT16_TO_STREAM (pp, HCI_BLE_WRITE_SCAN_PARAMS); 194 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_BLE_WRITE_SCAN_PARAM); 195 196 UINT8_TO_STREAM (pp, scan_type); 197 UINT16_TO_STREAM (pp, scan_int); 198 UINT16_TO_STREAM (pp, scan_win); 199 UINT8_TO_STREAM (pp, addr_type_own); 200 UINT8_TO_STREAM (pp, scan_filter_policy); 201 202 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 203 return (TRUE); 204 } 205 206 BOOLEAN btsnd_hcic_ble_set_scan_enable (UINT8 scan_enable, UINT8 duplicate) 207 { 208 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 209 UINT8 *pp = (UINT8 *)(p + 1); 210 211 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_WRITE_SCAN_ENABLE; 212 p->offset = 0; 213 214 UINT16_TO_STREAM (pp, HCI_BLE_WRITE_SCAN_ENABLE); 215 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_BLE_WRITE_SCAN_ENABLE); 216 217 UINT8_TO_STREAM (pp, scan_enable); 218 UINT8_TO_STREAM (pp, duplicate); 219 220 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 221 return (TRUE); 222 } 223 224 /* link layer connection management commands */ 225 BOOLEAN btsnd_hcic_ble_create_ll_conn (UINT16 scan_int, UINT16 scan_win, 226 UINT8 init_filter_policy, 227 UINT8 addr_type_peer, BD_ADDR bda_peer, 228 UINT8 addr_type_own, 229 UINT16 conn_int_min, UINT16 conn_int_max, 230 UINT16 conn_latency, UINT16 conn_timeout, 231 UINT16 min_ce_len, UINT16 max_ce_len) 232 { 233 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 234 UINT8 *pp = (UINT8 *)(p + 1); 235 236 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_CREATE_LL_CONN; 237 p->offset = 0; 238 239 UINT16_TO_STREAM (pp, HCI_BLE_CREATE_LL_CONN); 240 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_BLE_CREATE_LL_CONN); 241 242 UINT16_TO_STREAM (pp, scan_int); 243 UINT16_TO_STREAM (pp, scan_win); 244 UINT8_TO_STREAM (pp, init_filter_policy); 245 246 UINT8_TO_STREAM (pp, addr_type_peer); 247 BDADDR_TO_STREAM (pp, bda_peer); 248 UINT8_TO_STREAM (pp, addr_type_own); 249 250 UINT16_TO_STREAM (pp, conn_int_min); 251 UINT16_TO_STREAM (pp, conn_int_max); 252 UINT16_TO_STREAM (pp, conn_latency); 253 UINT16_TO_STREAM (pp, conn_timeout); 254 255 UINT16_TO_STREAM (pp, min_ce_len); 256 UINT16_TO_STREAM (pp, max_ce_len); 257 258 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 259 return (TRUE); 260 } 261 262 BOOLEAN btsnd_hcic_ble_create_conn_cancel (void) 263 { 264 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 265 UINT8 *pp = (UINT8 *)(p + 1); 266 267 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_CREATE_CONN_CANCEL; 268 p->offset = 0; 269 270 UINT16_TO_STREAM (pp, HCI_BLE_CREATE_CONN_CANCEL); 271 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_BLE_CREATE_CONN_CANCEL); 272 273 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 274 return (TRUE); 275 } 276 277 BOOLEAN btsnd_hcic_ble_clear_white_list (void) 278 { 279 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 280 UINT8 *pp = (UINT8 *)(p + 1); 281 282 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CLEAR_WHITE_LIST; 283 p->offset = 0; 284 285 UINT16_TO_STREAM (pp, HCI_BLE_CLEAR_WHITE_LIST); 286 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_CLEAR_WHITE_LIST); 287 288 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 289 return (TRUE); 290 } 291 292 BOOLEAN btsnd_hcic_ble_add_white_list (UINT8 addr_type, BD_ADDR bda) 293 { 294 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 295 UINT8 *pp = (UINT8 *)(p + 1); 296 297 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_ADD_WHITE_LIST; 298 p->offset = 0; 299 300 UINT16_TO_STREAM (pp, HCI_BLE_ADD_WHITE_LIST); 301 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_ADD_WHITE_LIST); 302 303 UINT8_TO_STREAM (pp, addr_type); 304 BDADDR_TO_STREAM (pp, bda); 305 306 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 307 return (TRUE); 308 } 309 310 BOOLEAN btsnd_hcic_ble_remove_from_white_list (UINT8 addr_type, BD_ADDR bda) 311 { 312 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 313 UINT8 *pp = (UINT8 *)(p + 1); 314 315 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_REMOVE_WHITE_LIST; 316 p->offset = 0; 317 318 UINT16_TO_STREAM (pp, HCI_BLE_REMOVE_WHITE_LIST); 319 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_REMOVE_WHITE_LIST); 320 321 UINT8_TO_STREAM (pp, addr_type); 322 BDADDR_TO_STREAM (pp, bda); 323 324 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 325 return (TRUE); 326 } 327 328 BOOLEAN btsnd_hcic_ble_upd_ll_conn_params (UINT16 handle, 329 UINT16 conn_int_min, UINT16 conn_int_max, 330 UINT16 conn_latency, UINT16 conn_timeout, 331 UINT16 min_ce_len, UINT16 max_ce_len) 332 { 333 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 334 UINT8 *pp = (UINT8 *)(p + 1); 335 336 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_UPD_LL_CONN_PARAMS; 337 p->offset = 0; 338 339 UINT16_TO_STREAM (pp, HCI_BLE_UPD_LL_CONN_PARAMS); 340 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_BLE_UPD_LL_CONN_PARAMS); 341 342 UINT16_TO_STREAM (pp, handle); 343 344 UINT16_TO_STREAM (pp, conn_int_min); 345 UINT16_TO_STREAM (pp, conn_int_max); 346 UINT16_TO_STREAM (pp, conn_latency); 347 UINT16_TO_STREAM (pp, conn_timeout); 348 UINT16_TO_STREAM (pp, min_ce_len); 349 UINT16_TO_STREAM (pp, max_ce_len); 350 351 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 352 return (TRUE); 353 } 354 355 BOOLEAN btsnd_hcic_ble_set_host_chnl_class (UINT8 chnl_map[HCIC_BLE_CHNL_MAP_SIZE]) 356 { 357 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 358 UINT8 *pp = (UINT8 *)(p + 1); 359 360 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_SET_HOST_CHNL_CLASS; 361 p->offset = 0; 362 363 UINT16_TO_STREAM (pp, HCI_BLE_SET_HOST_CHNL_CLASS); 364 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_SET_HOST_CHNL_CLASS); 365 366 ARRAY_TO_STREAM (pp, chnl_map, HCIC_BLE_CHNL_MAP_SIZE); 367 368 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 369 return (TRUE); 370 } 371 372 BOOLEAN btsnd_hcic_ble_read_chnl_map (UINT16 handle) 373 { 374 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 375 UINT8 *pp = (UINT8 *)(p + 1); 376 377 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_READ_CHNL_MAP; 378 p->offset = 0; 379 380 UINT16_TO_STREAM (pp, HCI_BLE_READ_CHNL_MAP); 381 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_READ_CHNL_MAP); 382 383 UINT16_TO_STREAM (pp, handle); 384 385 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 386 return (TRUE); 387 } 388 389 BOOLEAN btsnd_hcic_ble_read_remote_feat (UINT16 handle) 390 { 391 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 392 UINT8 *pp = (UINT8 *)(p + 1); 393 394 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_READ_REMOTE_FEAT; 395 p->offset = 0; 396 397 UINT16_TO_STREAM (pp, HCI_BLE_READ_REMOTE_FEAT); 398 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_BLE_READ_REMOTE_FEAT); 399 400 UINT16_TO_STREAM (pp, handle); 401 402 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 403 return (TRUE); 404 } 405 406 /* security management commands */ 407 BOOLEAN btsnd_hcic_ble_encrypt (UINT8 *key, UINT8 key_len, 408 UINT8 *plain_text, UINT8 pt_len, 409 void *p_cmd_cplt_cback) 410 { 411 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 412 UINT8 *pp = (UINT8 *)(p + 1); 413 414 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_ENCRYPT; 415 p->offset = sizeof(void *); 416 417 *((void **)pp) = p_cmd_cplt_cback; /* Store command complete callback in buffer */ 418 pp += sizeof(void *); /* Skip over callback pointer */ 419 420 421 UINT16_TO_STREAM (pp, HCI_BLE_ENCRYPT); 422 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_BLE_ENCRYPT); 423 424 memset(pp, 0, HCIC_PARAM_SIZE_BLE_ENCRYPT); 425 426 if (key_len > HCIC_BLE_ENCRYT_KEY_SIZE) key_len = HCIC_BLE_ENCRYT_KEY_SIZE; 427 if (pt_len > HCIC_BLE_ENCRYT_KEY_SIZE) pt_len = HCIC_BLE_ENCRYT_KEY_SIZE; 428 429 ARRAY_TO_STREAM (pp, key, key_len); 430 pp += (HCIC_BLE_ENCRYT_KEY_SIZE - key_len); 431 ARRAY_TO_STREAM (pp, plain_text, pt_len); 432 433 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 434 return (TRUE); 435 } 436 437 BOOLEAN btsnd_hcic_ble_rand (void *p_cmd_cplt_cback) 438 { 439 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 440 UINT8 *pp = (UINT8 *)(p + 1); 441 442 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_RAND; 443 p->offset = sizeof(void *); 444 445 *((void **)pp) = p_cmd_cplt_cback; /* Store command complete callback in buffer */ 446 pp += sizeof(void *); /* Skip over callback pointer */ 447 448 UINT16_TO_STREAM (pp, HCI_BLE_RAND); 449 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_BLE_RAND); 450 451 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 452 return (TRUE); 453 } 454 455 BOOLEAN btsnd_hcic_ble_start_enc (UINT16 handle, UINT8 rand[HCIC_BLE_RAND_DI_SIZE], 456 UINT16 ediv, UINT8 ltk[HCIC_BLE_ENCRYT_KEY_SIZE]) 457 { 458 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 459 UINT8 *pp = (UINT8 *)(p + 1); 460 461 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_START_ENC; 462 p->offset = 0; 463 464 UINT16_TO_STREAM (pp, HCI_BLE_START_ENC); 465 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_BLE_START_ENC); 466 467 UINT16_TO_STREAM (pp, handle); 468 ARRAY_TO_STREAM (pp, rand, HCIC_BLE_RAND_DI_SIZE); 469 UINT16_TO_STREAM (pp, ediv); 470 ARRAY_TO_STREAM (pp, ltk, HCIC_BLE_ENCRYT_KEY_SIZE); 471 472 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 473 return (TRUE); 474 } 475 476 BOOLEAN btsnd_hcic_ble_ltk_req_reply (UINT16 handle, UINT8 ltk[HCIC_BLE_ENCRYT_KEY_SIZE]) 477 { 478 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 479 UINT8 *pp = (UINT8 *)(p + 1); 480 481 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_LTK_REQ_REPLY; 482 p->offset = 0; 483 484 UINT16_TO_STREAM (pp, HCI_BLE_LTK_REQ_REPLY); 485 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_LTK_REQ_REPLY); 486 487 UINT16_TO_STREAM (pp, handle); 488 ARRAY_TO_STREAM (pp, ltk, HCIC_BLE_ENCRYT_KEY_SIZE); 489 490 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 491 return (TRUE); 492 } 493 494 BOOLEAN btsnd_hcic_ble_ltk_req_neg_reply (UINT16 handle) 495 { 496 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 497 UINT8 *pp = (UINT8 *)(p + 1); 498 499 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_LTK_REQ_NEG_REPLY; 500 p->offset = 0; 501 502 UINT16_TO_STREAM (pp, HCI_BLE_LTK_REQ_NEG_REPLY); 503 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_LTK_REQ_NEG_REPLY); 504 505 UINT16_TO_STREAM (pp, handle); 506 507 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 508 return (TRUE); 509 } 510 511 BOOLEAN btsnd_hcic_ble_receiver_test(UINT8 rx_freq) 512 { 513 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 514 UINT8 *pp = (UINT8 *)(p + 1); 515 516 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM1; 517 p->offset = 0; 518 519 UINT16_TO_STREAM (pp, HCI_BLE_RECEIVER_TEST); 520 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_WRITE_PARAM1); 521 522 UINT8_TO_STREAM (pp, rx_freq); 523 524 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 525 return (TRUE); 526 } 527 528 BOOLEAN btsnd_hcic_ble_transmitter_test(UINT8 tx_freq, UINT8 test_data_len, UINT8 payload) 529 { 530 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 531 UINT8 *pp = (UINT8 *)(p + 1); 532 533 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM3; 534 p->offset = 0; 535 536 UINT16_TO_STREAM (pp, HCI_BLE_TRANSMITTER_TEST); 537 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_WRITE_PARAM3); 538 539 UINT8_TO_STREAM (pp, tx_freq); 540 UINT8_TO_STREAM (pp, test_data_len); 541 UINT8_TO_STREAM (pp, payload); 542 543 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 544 return (TRUE); 545 } 546 547 BOOLEAN btsnd_hcic_ble_test_end(void) 548 { 549 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 550 UINT8 *pp = (UINT8 *)(p + 1); 551 552 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_READ_CMD; 553 p->offset = 0; 554 555 UINT16_TO_STREAM (pp, HCI_BLE_TEST_END); 556 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_READ_CMD); 557 558 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 559 return (TRUE); 560 } 561 562 BOOLEAN btsnd_hcic_ble_read_host_supported (void) 563 { 564 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 565 UINT8 *pp = (UINT8 *)(p + 1); 566 567 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_READ_CMD; 568 p->offset = 0; 569 570 UINT16_TO_STREAM (pp, HCI_READ_LE_HOST_SUPPORT); 571 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_READ_CMD); 572 573 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 574 return (TRUE); 575 } 576 577 #if (defined BLE_LLT_INCLUDED) && (BLE_LLT_INCLUDED == TRUE) 578 579 BOOLEAN btsnd_hcic_ble_rc_param_req_reply( UINT16 handle, 580 UINT16 conn_int_min, UINT16 conn_int_max, 581 UINT16 conn_latency, UINT16 conn_timeout, 582 UINT16 min_ce_len, UINT16 max_ce_len ) 583 { 584 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 585 UINT8 *pp = (UINT8 *)(p + 1); 586 587 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_RC_PARAM_REQ_REPLY; 588 p->offset = 0; 589 590 UINT16_TO_STREAM (pp, HCI_BLE_RC_PARAM_REQ_REPLY); 591 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_BLE_RC_PARAM_REQ_REPLY); 592 593 UINT16_TO_STREAM (pp, handle); 594 UINT16_TO_STREAM (pp, conn_int_min); 595 UINT16_TO_STREAM (pp, conn_int_max); 596 UINT16_TO_STREAM (pp, conn_latency); 597 UINT16_TO_STREAM (pp, conn_timeout); 598 UINT16_TO_STREAM (pp, min_ce_len); 599 UINT16_TO_STREAM (pp, max_ce_len); 600 601 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 602 return (TRUE); 603 } 604 605 BOOLEAN btsnd_hcic_ble_rc_param_req_neg_reply(UINT16 handle, UINT8 reason) 606 { 607 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 608 UINT8 *pp = (UINT8 *)(p + 1); 609 610 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_RC_PARAM_REQ_NEG_REPLY; 611 p->offset = 0; 612 613 UINT16_TO_STREAM (pp, HCI_BLE_RC_PARAM_REQ_NEG_REPLY); 614 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_BLE_RC_PARAM_REQ_NEG_REPLY); 615 616 UINT16_TO_STREAM (pp, handle); 617 UINT8_TO_STREAM (pp, reason); 618 619 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 620 return (TRUE); 621 } 622 #endif 623 624 BOOLEAN btsnd_hcic_ble_add_device_resolving_list (UINT8 addr_type_peer, BD_ADDR bda_peer, 625 UINT8 irk_peer[HCIC_BLE_IRK_SIZE], 626 UINT8 irk_local[HCIC_BLE_IRK_SIZE]) 627 { 628 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 629 UINT8 *pp = (UINT8 *)(p + 1); 630 631 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_ADD_DEV_RESOLVING_LIST; 632 p->offset = 0; 633 634 UINT16_TO_STREAM (pp, HCI_BLE_ADD_DEV_RESOLVING_LIST); 635 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_BLE_ADD_DEV_RESOLVING_LIST); 636 UINT8_TO_STREAM (pp, addr_type_peer); 637 BDADDR_TO_STREAM (pp, bda_peer); 638 ARRAY_TO_STREAM (pp, irk_peer, HCIC_BLE_ENCRYT_KEY_SIZE); 639 ARRAY_TO_STREAM (pp, irk_local, HCIC_BLE_ENCRYT_KEY_SIZE); 640 641 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 642 643 return (TRUE); 644 } 645 646 BOOLEAN btsnd_hcic_ble_rm_device_resolving_list (UINT8 addr_type_peer, BD_ADDR bda_peer) 647 { 648 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 649 UINT8 *pp = (UINT8 *)(p + 1); 650 651 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_RM_DEV_RESOLVING_LIST; 652 p->offset = 0; 653 654 UINT16_TO_STREAM (pp, HCI_BLE_RM_DEV_RESOLVING_LIST); 655 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_BLE_RM_DEV_RESOLVING_LIST); 656 UINT8_TO_STREAM (pp, addr_type_peer); 657 BDADDR_TO_STREAM (pp, bda_peer); 658 659 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 660 661 return (TRUE); 662 } 663 664 BOOLEAN btsnd_hcic_ble_clear_resolving_list (void) 665 { 666 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 667 UINT8 *pp = (UINT8 *)(p + 1); 668 669 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_CLEAR_RESOLVING_LIST; 670 p->offset = 0; 671 672 UINT16_TO_STREAM (pp, HCI_BLE_CLEAR_RESOLVING_LIST); 673 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_BLE_CLEAR_RESOLVING_LIST); 674 675 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 676 677 return (TRUE); 678 } 679 680 BOOLEAN btsnd_hcic_ble_read_resolvable_addr_peer (UINT8 addr_type_peer, BD_ADDR bda_peer) 681 { 682 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 683 UINT8 *pp = (UINT8 *)(p + 1); 684 685 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_READ_RESOLVABLE_ADDR_PEER; 686 p->offset = 0; 687 688 UINT16_TO_STREAM (pp, HCI_BLE_READ_RESOLVABLE_ADDR_PEER); 689 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_BLE_READ_RESOLVABLE_ADDR_PEER); 690 UINT8_TO_STREAM (pp, addr_type_peer); 691 BDADDR_TO_STREAM (pp, bda_peer); 692 693 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 694 695 return (TRUE); 696 } 697 698 BOOLEAN btsnd_hcic_ble_read_resolvable_addr_local (UINT8 addr_type_peer, BD_ADDR bda_peer) 699 { 700 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 701 UINT8 *pp = (UINT8 *)(p + 1); 702 703 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_READ_RESOLVABLE_ADDR_LOCAL; 704 p->offset = 0; 705 706 UINT16_TO_STREAM (pp, HCI_BLE_READ_RESOLVABLE_ADDR_LOCAL); 707 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_BLE_READ_RESOLVABLE_ADDR_LOCAL); 708 UINT8_TO_STREAM (pp, addr_type_peer); 709 BDADDR_TO_STREAM (pp, bda_peer); 710 711 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 712 713 return (TRUE); 714 } 715 716 BOOLEAN btsnd_hcic_ble_set_addr_resolution_enable (UINT8 addr_resolution_enable) 717 { 718 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 719 UINT8 *pp = (UINT8 *)(p + 1); 720 721 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_SET_ADDR_RESOLUTION_ENABLE; 722 p->offset = 0; 723 724 UINT16_TO_STREAM (pp, HCI_BLE_SET_ADDR_RESOLUTION_ENABLE); 725 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_BLE_SET_ADDR_RESOLUTION_ENABLE); 726 UINT8_TO_STREAM (pp, addr_resolution_enable); 727 728 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 729 730 return (TRUE); 731 } 732 733 BOOLEAN btsnd_hcic_ble_set_rand_priv_addr_timeout (UINT16 rpa_timout) 734 { 735 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 736 UINT8 *pp = (UINT8 *)(p + 1); 737 738 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_SET_RAND_PRIV_ADDR_TIMOUT; 739 p->offset = 0; 740 741 UINT16_TO_STREAM (pp, HCI_BLE_SET_RAND_PRIV_ADDR_TIMOUT); 742 UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_BLE_SET_RAND_PRIV_ADDR_TIMOUT); 743 UINT16_TO_STREAM (pp, rpa_timout); 744 745 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 746 747 return (TRUE); 748 } 749 750 BOOLEAN btsnd_hcic_ble_set_data_length(UINT16 conn_handle, UINT16 tx_octets, UINT16 tx_time) 751 { 752 BT_HDR *p = (BT_HDR *)osi_malloc(HCI_CMD_BUF_SIZE); 753 UINT8 *pp = (UINT8 *)(p + 1); 754 755 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_SET_DATA_LENGTH; 756 p->offset = 0; 757 758 UINT16_TO_STREAM(pp, HCI_BLE_SET_DATA_LENGTH); 759 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_SET_DATA_LENGTH); 760 761 UINT16_TO_STREAM(pp, conn_handle); 762 UINT16_TO_STREAM(pp, tx_octets); 763 UINT16_TO_STREAM(pp, tx_time); 764 765 btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p); 766 return TRUE; 767 } 768 769 #endif 770 771
