| /art/compiler/jni/quick/ |
| jni_compiler.cc | 217 ManagedRegister out_reg = main_jni_conv->CurrentParamRegister(); local
218 __ CreateHandleScopeEntry(out_reg, class_handle_scope_offset,
264 ManagedRegister out_reg = main_jni_conv->CurrentParamRegister(); local
265 __ CreateHandleScopeEntry(out_reg, locked_object_handle_scope_offset,
336 ManagedRegister out_reg = main_jni_conv->CurrentParamRegister(); local
337 __ CreateHandleScopeEntry(out_reg, handle_scope_offset,
430 ManagedRegister out_reg = end_jni_conv->CurrentParamRegister(); local
431 __ Load(out_reg, saved_cookie_offset, 4);
442 ManagedRegister out_reg = end_jni_conv->CurrentParamRegister(); local
443 __ CreateHandleScopeEntry(out_reg, locked_object_handle_scope_offset
533 ManagedRegister out_reg = jni_conv->CurrentParamRegister(); local
557 ManagedRegister out_reg = jni_conv->CurrentParamRegister(); local
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| /art/compiler/utils/arm64/ |
| assembler_arm64.cc | 552 Arm64ManagedRegister out_reg = m_out_reg.AsArm64(); local
556 CHECK(out_reg.IsXRegister()) << out_reg;
560 // e.g. out_reg = (handle == 0) ? 0 : (SP+handle_offset)
562 LoadWFromOffset(kLoadWord, out_reg.AsOverlappingWRegister(), SP,
564 in_reg = out_reg;
567 if (!out_reg.Equals(in_reg)) {
568 LoadImmediate(out_reg.AsXRegister(), 0, eq);
570 AddConstant(out_reg.AsXRegister(), SP, handle_scope_offs.Int32Value(), ne);
572 AddConstant(out_reg.AsXRegister(), SP, handle_scope_offs.Int32Value(), al)
597 Arm64ManagedRegister out_reg = m_out_reg.AsArm64(); local
[all...] |
| /art/compiler/optimizing/ |
| intrinsics_arm.cc | 304 Register out_reg = output.AsRegister<Register>(); local
307 __ add(out_reg, in_reg, ShifterOperand(mask));
308 __ eor(out_reg, mask, ShifterOperand(out_reg));
[all...] |
| intrinsics_arm64.cc | 417 FPRegister out_reg = is64bit ? DRegisterFrom(out) : SRegisterFrom(out); local
419 __ Fabs(out_reg, in_reg);
453 Register out_reg = is64bit ? XRegisterFrom(output) : WRegisterFrom(output); local
456 __ Cneg(out_reg, in_reg, lt);
485 FPRegister out_reg = is_double ? DRegisterFrom(out) : SRegisterFrom(out); local
487 __ Fmin(out_reg, op1_reg, op2_reg);
489 __ Fmax(out_reg, op1_reg, op2_reg);
545 Register out_reg = is_long ? XRegisterFrom(out) : WRegisterFrom(out); local
548 __ Csel(out_reg, op1_reg, op2_reg, is_min ? lt : gt);
636 Register out_reg = is_double local
[all...] |
| code_generator_arm.cc | 3311 Register out_reg = out.AsRegister<Register>(); local
4081 DRegister out_reg = FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()); local
5790 Register out_reg = out.AsRegister<Register>(); local
5898 Register out_reg = out.AsRegister<Register>(); local
5932 Register out_reg = out.AsRegister<Register>(); local
5967 Register out_reg = out.AsRegister<Register>(); local
5998 Register out_reg = out.AsRegister<Register>(); local
[all...] |
| code_generator_x86.cc | 6712 Register out_reg = out.AsRegister<Register>(); local
6743 Register out_reg = out.AsRegister<Register>(); local
[all...] |
| code_generator_x86_64.cc | 6175 CpuRegister out_reg = out.AsRegister<CpuRegister>(); local
6206 CpuRegister out_reg = out.AsRegister<CpuRegister>(); local
[all...] |
| /art/compiler/utils/x86/ |
| assembler_x86.cc | 2289 X86ManagedRegister out_reg = mout_reg.AsX86(); local
2330 X86ManagedRegister out_reg = mout_reg.AsX86(); local
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| /art/compiler/utils/x86_64/ |
| assembler_x86_64.cc | 3041 X86_64ManagedRegister out_reg = mout_reg.AsX86_64(); local
3088 X86_64ManagedRegister out_reg = mout_reg.AsX86_64(); local
[all...] |
| /art/compiler/utils/mips64/ |
| assembler_mips64.cc | 2332 Mips64ManagedRegister out_reg = mout_reg.AsMips64(); local
2382 Mips64ManagedRegister out_reg = mout_reg.AsMips64(); local
[all...] |
| /art/compiler/utils/mips/ |
| assembler_mips.cc | 2781 MipsManagedRegister out_reg = mout_reg.AsMips(); local
2830 MipsManagedRegister out_reg = mout_reg.AsMips(); local
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| /external/valgrind/perf/ |
| tinycc.c | 17979 int nb_outputs, nb_operands, i, must_subst, out_reg; local
[all...] |
