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      1 ; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s
      2 
      3 %struct.__neon_int8x8x4_t = type { <8 x i8>,  <8 x i8>,  <8 x i8>, <8 x i8> }
      4 %struct.__neon_int16x4x4_t = type { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> }
      5 %struct.__neon_int32x2x4_t = type { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> }
      6 %struct.__neon_float32x2x4_t = type { <2 x float>, <2 x float>, <2 x float>, <2 x float> }
      7 %struct.__neon_int64x1x4_t = type { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> }
      8 
      9 %struct.__neon_int8x16x4_t = type { <16 x i8>,  <16 x i8>,  <16 x i8>, <16 x i8> }
     10 %struct.__neon_int16x8x4_t = type { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> }
     11 %struct.__neon_int32x4x4_t = type { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> }
     12 %struct.__neon_float32x4x4_t = type { <4 x float>, <4 x float>, <4 x float>, <4 x float> }
     13 
     14 define <8 x i8> @vld4i8(i8* %A) nounwind {
     15 ;CHECK-LABEL: vld4i8:
     16 ;Check the alignment value.  Max for this instruction is 256 bits:
     17 ;CHECK: vld4.8 {d16, d17, d18, d19}, [r0:64]
     18 	%tmp1 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4.v8i8.p0i8(i8* %A, i32 8)
     19         %tmp2 = extractvalue %struct.__neon_int8x8x4_t %tmp1, 0
     20         %tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp1, 2
     21         %tmp4 = add <8 x i8> %tmp2, %tmp3
     22 	ret <8 x i8> %tmp4
     23 }
     24 
     25 ;Check for a post-increment updating load with register increment.
     26 define <8 x i8> @vld4i8_update(i8** %ptr, i32 %inc) nounwind {
     27 ;CHECK-LABEL: vld4i8_update:
     28 ;CHECK: vld4.8 {d16, d17, d18, d19}, [r2:128], r1
     29 	%A = load i8*, i8** %ptr
     30 	%tmp1 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4.v8i8.p0i8(i8* %A, i32 16)
     31 	%tmp2 = extractvalue %struct.__neon_int8x8x4_t %tmp1, 0
     32 	%tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp1, 2
     33 	%tmp4 = add <8 x i8> %tmp2, %tmp3
     34 	%tmp5 = getelementptr i8, i8* %A, i32 %inc
     35 	store i8* %tmp5, i8** %ptr
     36 	ret <8 x i8> %tmp4
     37 }
     38 
     39 define <4 x i16> @vld4i16(i16* %A) nounwind {
     40 ;CHECK-LABEL: vld4i16:
     41 ;Check the alignment value.  Max for this instruction is 256 bits:
     42 ;CHECK: vld4.16 {d16, d17, d18, d19}, [r0:128]
     43 	%tmp0 = bitcast i16* %A to i8*
     44 	%tmp1 = call %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4.v4i16.p0i8(i8* %tmp0, i32 16)
     45         %tmp2 = extractvalue %struct.__neon_int16x4x4_t %tmp1, 0
     46         %tmp3 = extractvalue %struct.__neon_int16x4x4_t %tmp1, 2
     47         %tmp4 = add <4 x i16> %tmp2, %tmp3
     48 	ret <4 x i16> %tmp4
     49 }
     50 
     51 define <2 x i32> @vld4i32(i32* %A) nounwind {
     52 ;CHECK-LABEL: vld4i32:
     53 ;Check the alignment value.  Max for this instruction is 256 bits:
     54 ;CHECK: vld4.32 {d16, d17, d18, d19}, [r0:256]
     55 	%tmp0 = bitcast i32* %A to i8*
     56 	%tmp1 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4.v2i32.p0i8(i8* %tmp0, i32 32)
     57         %tmp2 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 0
     58         %tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 2
     59         %tmp4 = add <2 x i32> %tmp2, %tmp3
     60 	ret <2 x i32> %tmp4
     61 }
     62 
     63 define <2 x float> @vld4f(float* %A) nounwind {
     64 ;CHECK-LABEL: vld4f:
     65 ;CHECK: vld4.32
     66 	%tmp0 = bitcast float* %A to i8*
     67 	%tmp1 = call %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4.v2f32.p0i8(i8* %tmp0, i32 1)
     68         %tmp2 = extractvalue %struct.__neon_float32x2x4_t %tmp1, 0
     69         %tmp3 = extractvalue %struct.__neon_float32x2x4_t %tmp1, 2
     70         %tmp4 = fadd <2 x float> %tmp2, %tmp3
     71 	ret <2 x float> %tmp4
     72 }
     73 
     74 define <1 x i64> @vld4i64(i64* %A) nounwind {
     75 ;CHECK-LABEL: vld4i64:
     76 ;Check the alignment value.  Max for this instruction is 256 bits:
     77 ;CHECK: vld1.64 {d16, d17, d18, d19}, [r0:256]
     78 	%tmp0 = bitcast i64* %A to i8*
     79 	%tmp1 = call %struct.__neon_int64x1x4_t @llvm.arm.neon.vld4.v1i64.p0i8(i8* %tmp0, i32 64)
     80         %tmp2 = extractvalue %struct.__neon_int64x1x4_t %tmp1, 0
     81         %tmp3 = extractvalue %struct.__neon_int64x1x4_t %tmp1, 2
     82         %tmp4 = add <1 x i64> %tmp2, %tmp3
     83 	ret <1 x i64> %tmp4
     84 }
     85 
     86 define <1 x i64> @vld4i64_update(i64** %ptr, i64* %A) nounwind {
     87 ;CHECK-LABEL: vld4i64_update:
     88 ;CHECK: vld1.64 {d16, d17, d18, d19}, [r1:256]!
     89         %tmp0 = bitcast i64* %A to i8*
     90         %tmp1 = call %struct.__neon_int64x1x4_t @llvm.arm.neon.vld4.v1i64.p0i8(i8* %tmp0, i32 64)
     91         %tmp5 = getelementptr i64, i64* %A, i32 4
     92         store i64* %tmp5, i64** %ptr
     93         %tmp2 = extractvalue %struct.__neon_int64x1x4_t %tmp1, 0
     94         %tmp3 = extractvalue %struct.__neon_int64x1x4_t %tmp1, 2
     95         %tmp4 = add <1 x i64> %tmp2, %tmp3
     96         ret <1 x i64> %tmp4
     97 }
     98 
     99 define <16 x i8> @vld4Qi8(i8* %A) nounwind {
    100 ;CHECK-LABEL: vld4Qi8:
    101 ;Check the alignment value.  Max for this instruction is 256 bits:
    102 ;CHECK: vld4.8 {d16, d18, d20, d22}, [r0:256]!
    103 ;CHECK: vld4.8 {d17, d19, d21, d23}, [r0:256]
    104 	%tmp1 = call %struct.__neon_int8x16x4_t @llvm.arm.neon.vld4.v16i8.p0i8(i8* %A, i32 64)
    105         %tmp2 = extractvalue %struct.__neon_int8x16x4_t %tmp1, 0
    106         %tmp3 = extractvalue %struct.__neon_int8x16x4_t %tmp1, 2
    107         %tmp4 = add <16 x i8> %tmp2, %tmp3
    108 	ret <16 x i8> %tmp4
    109 }
    110 
    111 define <8 x i16> @vld4Qi16(i16* %A) nounwind {
    112 ;CHECK-LABEL: vld4Qi16:
    113 ;Check for no alignment specifier.
    114 ;CHECK: vld4.16 {d16, d18, d20, d22}, [r0]!
    115 ;CHECK: vld4.16 {d17, d19, d21, d23}, [r0]
    116 	%tmp0 = bitcast i16* %A to i8*
    117 	%tmp1 = call %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4.v8i16.p0i8(i8* %tmp0, i32 1)
    118         %tmp2 = extractvalue %struct.__neon_int16x8x4_t %tmp1, 0
    119         %tmp3 = extractvalue %struct.__neon_int16x8x4_t %tmp1, 2
    120         %tmp4 = add <8 x i16> %tmp2, %tmp3
    121 	ret <8 x i16> %tmp4
    122 }
    123 
    124 ;Check for a post-increment updating load. 
    125 define <8 x i16> @vld4Qi16_update(i16** %ptr) nounwind {
    126 ;CHECK-LABEL: vld4Qi16_update:
    127 ;CHECK: vld4.16 {d16, d18, d20, d22}, [r1:64]!
    128 ;CHECK: vld4.16 {d17, d19, d21, d23}, [r1:64]!
    129 	%A = load i16*, i16** %ptr
    130 	%tmp0 = bitcast i16* %A to i8*
    131 	%tmp1 = call %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4.v8i16.p0i8(i8* %tmp0, i32 8)
    132 	%tmp2 = extractvalue %struct.__neon_int16x8x4_t %tmp1, 0
    133 	%tmp3 = extractvalue %struct.__neon_int16x8x4_t %tmp1, 2
    134 	%tmp4 = add <8 x i16> %tmp2, %tmp3
    135 	%tmp5 = getelementptr i16, i16* %A, i32 32
    136 	store i16* %tmp5, i16** %ptr
    137 	ret <8 x i16> %tmp4
    138 }
    139 
    140 define <4 x i32> @vld4Qi32(i32* %A) nounwind {
    141 ;CHECK-LABEL: vld4Qi32:
    142 ;CHECK: vld4.32
    143 ;CHECK: vld4.32
    144 	%tmp0 = bitcast i32* %A to i8*
    145 	%tmp1 = call %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4.v4i32.p0i8(i8* %tmp0, i32 1)
    146         %tmp2 = extractvalue %struct.__neon_int32x4x4_t %tmp1, 0
    147         %tmp3 = extractvalue %struct.__neon_int32x4x4_t %tmp1, 2
    148         %tmp4 = add <4 x i32> %tmp2, %tmp3
    149 	ret <4 x i32> %tmp4
    150 }
    151 
    152 define <4 x float> @vld4Qf(float* %A) nounwind {
    153 ;CHECK-LABEL: vld4Qf:
    154 ;CHECK: vld4.32
    155 ;CHECK: vld4.32
    156 	%tmp0 = bitcast float* %A to i8*
    157 	%tmp1 = call %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4.v4f32.p0i8(i8* %tmp0, i32 1)
    158         %tmp2 = extractvalue %struct.__neon_float32x4x4_t %tmp1, 0
    159         %tmp3 = extractvalue %struct.__neon_float32x4x4_t %tmp1, 2
    160         %tmp4 = fadd <4 x float> %tmp2, %tmp3
    161 	ret <4 x float> %tmp4
    162 }
    163 
    164 declare %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4.v8i8.p0i8(i8*, i32) nounwind readonly
    165 declare %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4.v4i16.p0i8(i8*, i32) nounwind readonly
    166 declare %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4.v2i32.p0i8(i8*, i32) nounwind readonly
    167 declare %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4.v2f32.p0i8(i8*, i32) nounwind readonly
    168 declare %struct.__neon_int64x1x4_t @llvm.arm.neon.vld4.v1i64.p0i8(i8*, i32) nounwind readonly
    169 
    170 declare %struct.__neon_int8x16x4_t @llvm.arm.neon.vld4.v16i8.p0i8(i8*, i32) nounwind readonly
    171 declare %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4.v8i16.p0i8(i8*, i32) nounwind readonly
    172 declare %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4.v4i32.p0i8(i8*, i32) nounwind readonly
    173 declare %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4.v4f32.p0i8(i8*, i32) nounwind readonly
    174