| /external/libedit/src/ |
| keymacro.c | 628 #define ADDC(c) \
644 ADDC(sep[0]);
647 ADDC('^');
648 ADDC('@');
665 ADDC(sep[1]);
667 ADDC('\0');
|
| /system/core/toolbox/upstream-netbsd/bin/dd/ |
| misc.c | 206 #define ADDC(c) do { if (enable != 0) buffer_write(&c, 1, 0); } \
213 ADDC(*ptr);
295 ADDC(*ptr);
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/tic54x/ |
| all-opcodes.s | 1008 ; ADDC : ADDC Smem, AB : 2
1009 ADDC 06h, A ; 1
1010 ADDC 07h, B ; 2
1011 ; ADDC_I : ADDC Smem_I, AB : 240
1012 ADDC *AR0, A ; 1
1013 ADDC *AR0, B ; 2
1014 ADDC *AR0-, A ; 3
1015 ADDC *AR0-, B ; 4
1016 ADDC *AR0+, A ;
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 207 /// like ADDC/SUBC, which indicate the carry result is always false.
214 ADDC, SUBC,
[all...] |
| SelectionDAG.h | [all...] |
| /toolchain/binutils/binutils-2.25/include/opcode/ |
| m88k.h | 254 #define ADDC 2
|
| /external/llvm/lib/Target/Mips/ |
| Mips16ISelDAGToDAG.cpp | 263 assert(((Opc == ISD::ADDC || Opc == ISD::ADDE) ||
|
| MipsSEISelDAGToDAG.cpp | 240 assert(((Opc == ISD::ADDC || Opc == ISD::ADDE) ||
[all...] |
| /external/pcre/dist/sljit/ |
| sljitNativeSPARC_32.c | 100 return push_inst(compiler, ADDC | (flags & SET_FLAGS) | D(dst) | S1(src1) | ARG2(flags, src2), DR(dst) | (flags & SET_FLAGS));
|
| sljitNativePPC_32.c | 119 return push_inst(compiler, ADDC | OERC(ALT_SET_FLAGS) | D(dst) | A(src1) | B(src2));
|
| sljitNativePPC_64.c | 240 return push_inst(compiler, ADDC | OERC(ALT_SET_FLAGS) | D(dst) | A(src1) | B(src2));
|
| sljitNativeSPARC_common.c | 119 #define ADDC (OPC1(0x2) | OPC3(0x08))
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 114 setOperationAction(ISD::ADDC, VT, Expand);
214 setOperationAction(ISD::ADDC, MVT::Other, Expand);
|
| /toolchain/binutils/binutils-2.25/gas/config/ |
| rl78-parse.y | 159 %token ADD ADDC ADDW AND_ AND1
200 /* addsub is ADD, ADDC, SUB, SUBC, AND, OR, XOR, and parts of CMP. */
1141 | ADDC { $$ = 0x10; }
1259 OPC(ADDC),
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.h | 70 ADDC, // Add with carry
|
| ARMISelLowering.cpp | 643 setTargetDAGCombine(ISD::ADDC);
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeIntegerTypes.cpp | [all...] |
| SelectionDAGDumper.cpp | 225 case ISD::ADDC: return "addc";
|
| DAGCombiner.cpp | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/BPF/ |
| BPFISelLowering.cpp | 127 setOperationAction(ISD::ADDC, MVT::i64, Expand);
|
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyISelLowering.cpp | 153 ISD::SRA_PARTS, ISD::SRL_PARTS, ISD::ADDC, ISD::ADDE, ISD::SUBC,
|
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 93 setOperationAction(ISD::ADDC, MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 206 setOperationAction(ISD::ADDC, MVT::i32, Custom);
210 setOperationAction(ISD::ADDC, MVT::i64, Custom);
[all...] |
