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  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
arch-avx-1.s 3 # AES + AVX
5 # PCLMUL + AVX
arch-avx-1-1.l 7 [ ]*1[ ]+\.include "arch-avx-1\.s"
10 [ ]*3[ ]+\# AES \+ AVX
12 [ ]*5[ ]+\# PCLMUL \+ AVX
arch-avx-1-2.l 7 [ ]*1[ ]+\.include "arch-avx-1\.s"
10 [ ]*3[ ]+\# AES \+ AVX
12 [ ]*5[ ]+\# PCLMUL \+ AVX
arch-avx-1-3.l 7 [ ]*1[ ]+\.include "arch-avx-1\.s"
10 [ ]*3[ ]+\# AES \+ AVX
12 [ ]*5[ ]+\# PCLMUL \+ AVX
arch-avx-1-4.l 6 [ ]*1[ ]+\.include "arch-avx-1\.s"
9 [ ]*3[ ]+\# AES \+ AVX
12 [ ]*5[ ]+\# PCLMUL \+ AVX
arch-avx-1-5.l 6 [ ]*1[ ]+\.include "arch-avx-1\.s"
9 [ ]*3[ ]+\# AES \+ AVX
11 [ ]*5[ ]+\# PCLMUL \+ AVX
arch-avx-1-6.l 7 [ ]*1[ ]+\.include "arch-avx-1\.s"
10 [ ]*3[ ]+\# AES \+ AVX
12 [ ]*5[ ]+\# PCLMUL \+ AVX
inval-avx.s 1 # Check illegal AVX instructions
x86-64-inval-avx.s 1 # Check illegal 64bit AVX instructions
inval-avx.l 11 [ ]*1[ ]+\# Check illegal AVX instructions
x86-64-inval-avx.l 11 [ ]*1[ ]+\# Check illegal 64bit AVX instructions
arch-10.s 23 # AVX
37 # AES + AVX
39 # PCLMUL + AVX
x86-64-arch-2.s 23 # AVX
37 # AES + AVX
39 # PCLMUL + AVX
arch-10-1.l 59 [ ]*23[ ]+\# AVX
73 [ ]*37[ ]+\# AES \+ AVX
75 [ ]*39[ ]+\# PCLMUL \+ AVX
arch-10-2.l 58 [ ]*23[ ]+\# AVX
72 [ ]*37[ ]+\# AES \+ AVX
74 [ ]*39[ ]+\# PCLMUL \+ AVX
arch-10-3.l 54 [ ]*23[ ]+\# AVX
68 [ ]*37[ ]+\# AES \+ AVX
70 [ ]*39[ ]+\# PCLMUL \+ AVX
arch-10-4.l 52 [ ]*23[ ]+\# AVX
66 [ ]*37[ ]+\# AES \+ AVX
68 [ ]*39[ ]+\# PCLMUL \+ AVX
x86-64-arch-2-1.l 53 [ ]*23[ ]+\# AVX
67 [ ]*37[ ]+\# AES \+ AVX
69 [ ]*39[ ]+\# PCLMUL \+ AVX
x86-64-arch-2-2.l 52 [ ]*23[ ]+\# AVX
66 [ ]*37[ ]+\# AES \+ AVX
68 [ ]*39[ ]+\# PCLMUL \+ AVX
rexw.s 17 # AVX instructions
40 # AVX instructions
sse-noavx.s 1 # Check SSE instructions without AVX equivalent
x86-64-sse-noavx.s 1 # Check 64bit SSE instructions without AVX equivalent
  /external/v8/src/x64/
assembler-x64.cc 49 // Mac OS X up to 10.9 has a bug where AVX transitions were indeed being
50 // caused by ISRs, so we detect that here and disable AVX in that case.
65 // Check whether OS claims to support AVX.
87 supported_ |= 1u << AVX;
108 "SSE3=%d SSE4_1=%d SAHF=%d AVX=%d FMA3=%d BMI1=%d BMI2=%d LZCNT=%d "
111 CpuFeatures::IsSupported(SAHF), CpuFeatures::IsSupported(AVX),
    [all...]
macro-assembler-x64.cc 763 if (CpuFeatures::IsSupported(AVX)) {
764 CpuFeatureScope scope(this, AVX);
773 if (CpuFeatures::IsSupported(AVX)) {
774 CpuFeatureScope scope(this, AVX);
783 if (CpuFeatures::IsSupported(AVX)) {
784 CpuFeatureScope scope(this, AVX);
793 if (CpuFeatures::IsSupported(AVX)) {
794 CpuFeatureScope scope(this, AVX);
803 if (CpuFeatures::IsSupported(AVX)) {
804 CpuFeatureScope scope(this, AVX);
    [all...]
  /external/libchrome/base/
cpu.h 28 AVX,

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