| /art/compiler/optimizing/ |
| intrinsics_mips64.cc | 59 GpuRegister trg_reg = trg.AsRegister<GpuRegister>();
151 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
187 GpuRegister in = locations->InAt(0).AsRegister<GpuRegister>();
226 GpuRegister in = locations->InAt(0).AsRegister<GpuRegister>();
227 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
278 GpuRegister in = locations->InAt(0).AsRegister<GpuRegister>();
279 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
313 __ Dsbh(out.AsRegister<GpuRegister>(), in.AsRegister<GpuRegister>());
314 __ Dshd(out.AsRegister<GpuRegister>(), out.AsRegister<GpuRegister>())
[all...] |
| intrinsics_arm.cc | 92 __ vmovrs(output.AsRegister<Register>(), input.AsFpuRegister<SRegister>());
104 __ vmovsr(output.AsFpuRegister<SRegister>(), input.AsRegister<Register>());
156 Register out = locations->Out().AsRegister<Register>();
170 __ clz(out, in.AsRegister<Register>());
199 Register out = locations->Out().AsRegister<Register>();
213 Register in = locations->InAt(0).AsRegister<Register>();
287 Register mask = locations->GetTemp(0).AsRegister<Register>();
303 Register in_reg = in.AsRegister<Register>();
304 Register out_reg = output.AsRegister<Register>();
332 Register op1 = locations->InAt(0).AsRegister<Register>()
[all...] |
| intrinsics_x86_64.cc | 101 __ movd(output.AsRegister<CpuRegister>(), input.AsFpuRegister<XmmRegister>(), is64bit);
107 __ movd(output.AsFpuRegister<XmmRegister>(), input.AsRegister<CpuRegister>(), is64bit);
149 CpuRegister out = locations->Out().AsRegister<CpuRegister>();
255 CpuRegister out = output.AsRegister<CpuRegister>();
256 CpuRegister mask = locations->GetTemp(0).AsRegister<CpuRegister>();
436 CpuRegister out = locations->Out().AsRegister<CpuRegister>();
437 CpuRegister op2 = op2_loc.AsRegister<CpuRegister>();
628 CpuRegister out = locations->Out().AsRegister<CpuRegister>();
678 CpuRegister out = locations->Out().AsRegister<CpuRegister>();
913 CpuRegister obj = locations->InAt(0).AsRegister<CpuRegister>()
[all...] |
| code_generator_x86_64.cc | 458 Register reg_out = out_.AsRegister<Register>();
527 CpuRegister reg_out = out_.AsRegister<CpuRegister>();
529 DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(reg_out.AsRegister())) << out_;
547 Register index_reg = index_.AsRegister<CpuRegister>().AsRegister();
572 Register free_reg = FindAvailableCallerSaveRegister(codegen).AsRegister();
642 size_t ref = static_cast<int>(ref_.AsRegister<CpuRegister>().AsRegister());
643 size_t obj = static_cast<int>(obj_.AsRegister<CpuRegister>().AsRegister());
[all...] |
| code_generator_x86.cc | 437 Register reg_out = out_.AsRegister<Register>();
506 Register reg_out = out_.AsRegister<Register>();
526 Register index_reg = index_.AsRegister<Register>();
622 size_t ref = static_cast<int>(ref_.AsRegister<Register>());
623 size_t obj = static_cast<int>(obj_.AsRegister<Register>());
660 Register reg_out = out_.AsRegister<Register>();
[all...] |
| code_generator_arm.cc | 420 Register reg_out = out_.AsRegister<Register>();
489 Register reg_out = out_.AsRegister<Register>();
509 Register index_reg = index_.AsRegister<Register>();
605 size_t ref = static_cast<int>(ref_.AsRegister<Register>());
606 size_t obj = static_cast<int>(obj_.AsRegister<Register>());
643 Register reg_out = out_.AsRegister<Register>();
[all...] |
| intrinsics_x86.cc | 122 __ movd(output.AsRegister<Register>(), input.AsFpuRegister<XmmRegister>());
138 __ movd(output.AsFpuRegister<XmmRegister>(), input.AsRegister<Register>());
197 Register out = locations->Out().AsRegister<Register>();
283 Register constant_area = locations->InAt(1).AsRegister<Register>();
335 Register out = output.AsRegister<Register>();
337 Register temp = locations->GetTemp(0).AsRegister<Register>();
368 Register temp = locations->GetTemp(0).AsRegister<Register>();
471 Register constant_area = locations->InAt(2).AsRegister<Register>();
593 Register temp = locations->GetTemp(0).AsRegister<Register>();
608 Register out = locations->Out().AsRegister<Register>()
[all...] |
| code_generator_mips64.cc | 674 destination.AsRegister<GpuRegister>(),
682 gpr = destination.AsRegister<GpuRegister>();
707 __ Move(destination.AsRegister<GpuRegister>(), source.AsRegister<GpuRegister>());
711 __ Dmtc1(source.AsRegister<GpuRegister>(), destination.AsFpuRegister<FpuRegister>());
713 __ Mtc1(source.AsRegister<GpuRegister>(), destination.AsFpuRegister<FpuRegister>());
728 __ Dmfc1(destination.AsRegister<GpuRegister>(), source.AsFpuRegister<FpuRegister>());
730 __ Mfc1(destination.AsRegister<GpuRegister>(), source.AsFpuRegister<FpuRegister>());
750 source.AsRegister<GpuRegister>(),
809 GpuRegister r1 = loc1.AsRegister<GpuRegister>()
[all...] |
| code_generator_mips.cc | 540 Register r1 = loc1.AsRegister<Register>();
541 Register r2 = loc2.AsRegister<Register>();
564 Register r2 = loc1.IsRegister() ? loc1.AsRegister<Register>()
565 : loc2.AsRegister<Register>();
606 Register reg = loc1.IsRegister() ? loc1.AsRegister<Register>()
607 : loc2.AsRegister<Register>();
830 __ Move(destination.AsRegister<Register>(), source.AsRegister<Register>());
832 __ Mfc1(destination.AsRegister<Register>(), source.AsFpuRegister<FRegister>());
835 __ LoadFromOffset(kLoadWord, destination.AsRegister<Register>(), SP, source.GetStackIndex())
[all...] |
| intrinsics_mips.cc | 71 Register trg_reg = trg.AsRegister<Register>();
170 Register out = locations->Out().AsRegister<Register>();
212 Register in = locations->InAt(0).AsRegister<Register>();
258 Register in = locations->InAt(0).AsRegister<Register>();
259 Register out = locations->Out().AsRegister<Register>();
272 Register in = locations->InAt(0).AsRegister<Register>();
273 Register out = locations->Out().AsRegister<Register>();
446 Register out = locations->Out().AsRegister<Register>();
462 Register in = locations->InAt(0).AsRegister<Register>();
494 Register out = locations->Out().AsRegister<Register>()
[all...] |
| locations.h | 174 T AsRegister() const {
|
| /art/compiler/utils/x86_64/ |
| managed_register_x86_64.cc | 63 Register low = AsRegisterPairLow().AsRegister();
64 Register high = AsRegisterPairHigh().AsRegister();
101 os << "CPU: " << static_cast<int>(AsCpuRegister().AsRegister());
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| constants_x86_64.h | 34 Register AsRegister() const {
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| assembler_x86_64.cc | 28 return os << reg.AsRegister();
1179 const bool src_rax = src.AsRegister() == RAX;
1180 const bool dst_rax = dst.AsRegister() == RAX;
1199 const bool src_rax = src.AsRegister() == RAX;
1200 const bool dst_rax = dst.AsRegister() == RAX;
[all...] |
| assembler_x86_64.h | 180 CHECK_EQ(base_in.AsRegister(), RSP);
211 CHECK_NE(index_in.AsRegister(), RSP); // Illegal addressing mode.
218 CHECK_NE(index_in.AsRegister(), RSP); // Illegal addressing mode.
[all...] |
| assembler_x86_64_test.cc | 123 return a.AsRegister() < b.AsRegister();
[all...] |
| /external/v8/src/compiler/ |
| instruction-selector-impl.h | 135 location.AsRegister());
249 int reg_id = primary_location.AsRegister();
275 location.AsRegister(), virtual_register);
278 location.AsRegister(), virtual_register);
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| linkage.h | 117 int32_t AsRegister() const {
|
