| /external/llvm/include/llvm/MC/ |
| MCFixupKindInfo.h | 20 FKF_IsPCRel = (1 << 0),
|
| /external/llvm/lib/MC/ |
| MCAsmBackend.cpp | 29 {"FK_PCRel_1", 0, 8, MCFixupKindInfo::FKF_IsPCRel},
30 {"FK_PCRel_2", 0, 16, MCFixupKindInfo::FKF_IsPCRel},
31 {"FK_PCRel_4", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
32 {"FK_PCRel_8", 0, 64, MCFixupKindInfo::FKF_IsPCRel},
|
| MCAssembler.cpp | 455 Fixup.getKind()).Flags & MCFixupKindInfo::FKF_IsPCRel;
877 MCFixupKindInfo::FKF_IsPCRel;
[all...] |
| MachObjectWriter.cpp | 64 return FKI.Flags & MCFixupKindInfo::FKF_IsPCRel;
[all...] |
| ELFObjectWriter.cpp | 302 return FKI.Flags & MCFixupKindInfo::FKF_IsPCRel;
[all...] |
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsAsmBackend.cpp | 281 { "fixup_Mips_PC16", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
294 { "fixup_Mips_Branch_PCRel", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
306 { "fixup_Mips_PC18_S3", 0, 18, MCFixupKindInfo::FKF_IsPCRel },
307 { "fixup_MIPS_PC19_S2", 0, 19, MCFixupKindInfo::FKF_IsPCRel },
308 { "fixup_MIPS_PC21_S2", 0, 21, MCFixupKindInfo::FKF_IsPCRel },
309 { "fixup_MIPS_PC26_S2", 0, 26, MCFixupKindInfo::FKF_IsPCRel },
310 { "fixup_MIPS_PCHI16", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
311 { "fixup_MIPS_PCLO16", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
316 { "fixup_MICROMIPS_PC7_S1", 0, 7, MCFixupKindInfo::FKF_IsPCRel },
317 { "fixup_MICROMIPS_PC10_S1", 0, 10, MCFixupKindInfo::FKF_IsPCRel },
[all...] |
| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HexagonAsmBackend.cpp | 70 {"fixup_Hexagon_B22_PCREL", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
71 {"fixup_Hexagon_B15_PCREL", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
72 {"fixup_Hexagon_B7_PCREL", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
83 {"fixup_Hexagon_B13_PCREL", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
84 {"fixup_Hexagon_B9_PCREL", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
85 {"fixup_Hexagon_B32_PCREL_X", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
87 {"fixup_Hexagon_B22_PCREL_X", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
88 {"fixup_Hexagon_B15_PCREL_X", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
89 {"fixup_Hexagon_B13_PCREL_X", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
90 {"fixup_Hexagon_B9_PCREL_X", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
[all...] |
| /external/llvm/lib/Target/Sparc/MCTargetDesc/ |
| SparcAsmBackend.cpp | 119 { "fixup_sparc_call30", 2, 30, MCFixupKindInfo::FKF_IsPCRel },
120 { "fixup_sparc_br22", 10, 22, MCFixupKindInfo::FKF_IsPCRel },
121 { "fixup_sparc_br19", 13, 19, MCFixupKindInfo::FKF_IsPCRel },
122 { "fixup_sparc_br16_2", 10, 2, MCFixupKindInfo::FKF_IsPCRel },
123 { "fixup_sparc_br16_14", 18, 14, MCFixupKindInfo::FKF_IsPCRel },
131 { "fixup_sparc_pc22", 10, 22, MCFixupKindInfo::FKF_IsPCRel },
132 { "fixup_sparc_pc10", 22, 10, MCFixupKindInfo::FKF_IsPCRel },
135 { "fixup_sparc_wplt30", 2, 30, MCFixupKindInfo::FKF_IsPCRel },
158 { "fixup_sparc_call30", 0, 30, MCFixupKindInfo::FKF_IsPCRel },
159 { "fixup_sparc_br22", 0, 22, MCFixupKindInfo::FKF_IsPCRel },
[all...] |
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMAsmBackend.cpp | 56 {"fixup_arm_ldst_pcrel_12", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
58 MCFixupKindInfo::FKF_IsPCRel |
60 {"fixup_arm_pcrel_10_unscaled", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
61 {"fixup_arm_pcrel_10", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
63 MCFixupKindInfo::FKF_IsPCRel |
66 MCFixupKindInfo::FKF_IsPCRel |
68 {"fixup_arm_adr_pcrel_12", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
70 MCFixupKindInfo::FKF_IsPCRel |
72 {"fixup_arm_condbranch", 0, 24, MCFixupKindInfo::FKF_IsPCRel},
73 {"fixup_arm_uncondbranch", 0, 24, MCFixupKindInfo::FKF_IsPCRel},
[all...] |
| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| PPCAsmBackend.cpp | 89 { "fixup_ppc_br24", 6, 24, MCFixupKindInfo::FKF_IsPCRel },
90 { "fixup_ppc_brcond14", 16, 14, MCFixupKindInfo::FKF_IsPCRel },
99 { "fixup_ppc_br24", 2, 24, MCFixupKindInfo::FKF_IsPCRel },
100 { "fixup_ppc_brcond14", 2, 14, MCFixupKindInfo::FKF_IsPCRel },
|
| /external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| SystemZMCAsmBackend.cpp | 74 { "FK_390_PC16DBL", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
75 { "FK_390_PC32DBL", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
|
| /external/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| AMDGPUAsmBackend.cpp | 146 { "fixup_si_sopp_br", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
147 { "fixup_si_rodata", 0, 32, MCFixupKindInfo::FKF_IsPCRel }
|
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64AsmBackend.cpp | 30 MCFixupKindInfo::FKF_IsAlignedDownTo32Bits | MCFixupKindInfo::FKF_IsPCRel;
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86AsmBackend.cpp | 93 { "reloc_riprel_4byte", 0, 4 * 8, MCFixupKindInfo::FKF_IsPCRel },
94 { "reloc_riprel_4byte_movq_load", 0, 4 * 8, MCFixupKindInfo::FKF_IsPCRel},
|
