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Searched
refs:Hazard
(Results
1 - 4
of
4
) sorted by null
/external/llvm/include/llvm/CodeGen/
ScheduleHazardRecognizer.h
11
//
hazard
-avoidance heuristics for scheduling.
24
/// the
hazard
.
39
Hazard
, // This instruction can't be emitted at this cycle.
53
/// getHazardType - Return the
hazard
type of emitting this node. There are
56
/// *
Hazard
: issuing this instruction would stall the machine. If some
65
/// instructions is about to be schedule. The
hazard
state should be
70
/// emitted, to advance the
hazard
state.
83
/// returns NoHazard. If, even though there is no
hazard
, it would be better to
92
/// internal state of the
hazard
recognizer so that previously "
Hazard
"
[
all
...]
/external/llvm/lib/Target/ARM/
ARMHazardRecognizer.cpp
1
//===-- ARMHazardRecognizer.cpp - ARM postra
hazard
recognizer ------------===//
69
return
Hazard
;
101
llvm_unreachable("reverse ARM
hazard
checking unsupported");
/external/llvm/lib/Target/PowerPC/
PPCHazardRecognizers.cpp
1
//===-- PPCHazardRecognizers.cpp - PowerPC
Hazard
Recognizer Impls --------===//
10
// This file implements
hazard
recognizers for scheduling on PowerPC processors.
237
// PowerPC 970
Hazard
Recognizer
271
// Structural
hazard
info.
320
/// getHazardType - We return
hazard
for any non-branch instruction that would
343
return
Hazard
;
349
return
Hazard
;
359
if (NumIssued == 4) return
Hazard
;
363
if (NumIssued >= 2) return
Hazard
;
398
// Update structural
hazard
information
[
all
...]
/external/llvm/lib/CodeGen/
ScoreboardHazardRecognizer.cpp
11
// encapsultes
hazard
-avoidance heuristics for scheduling, based on the
67
// completely bypasses the scoreboard
hazard
logic.
78
DEBUG(dbgs() << "Disabled scoreboard
hazard
recognizer\n");
82
DEBUG(dbgs() << "Using scoreboard
hazard
recognizer: Depth = "
165
DEBUG(dbgs() << "***
Hazard
in cycle +" << StageCycle << ", ");
168
return
Hazard
;
Completed in 348 milliseconds