| /art/compiler/utils/arm64/ |
| assembler_arm64.h | 45 enum LoadOperandType {
265 void LoadWFromOffset(LoadOperandType type, WRegister dest,
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| assembler_arm64.cc | 220 void Arm64Assembler::LoadWFromOffset(LoadOperandType type, WRegister dest,
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| /art/compiler/utils/mips64/ |
| assembler_mips64.h | 37 enum LoadOperandType {
355 void LoadFromOffset(LoadOperandType type, GpuRegister reg, GpuRegister base, int32_t offset);
356 void LoadFpuFromOffset(LoadOperandType type, FpuRegister reg, GpuRegister base, int32_t offset);
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| assembler_mips64.cc | [all...] |
| /art/compiler/utils/arm/ |
| assembler_arm.h | 218 enum LoadOperandType {
293 static bool CanHoldLoadOffsetArm(LoadOperandType type, int offset);
296 static bool CanHoldLoadOffsetThumb(LoadOperandType type, int offset);
782 virtual void LoadFromOffset(LoadOperandType type,
[all...] |
| assembler_arm.cc | 298 bool Address::CanHoldLoadOffsetArm(LoadOperandType type, int offset) {
335 bool Address::CanHoldLoadOffsetThumb(LoadOperandType type, int offset) {
[all...] |
| assembler_thumb2.h | 320 void LoadFromOffset(LoadOperandType type,
[all...] |
| assembler_arm32.h | 271 void LoadFromOffset(LoadOperandType type,
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| assembler_arm32.cc | [all...] |
| assembler_thumb2.cc | [all...] |
| /art/compiler/utils/mips/ |
| assembler_mips.h | 38 enum LoadOperandType {
388 void LoadFromOffset(LoadOperandType type, Register reg, Register base, int32_t offset);
[all...] |
| assembler_mips.cc | [all...] |
| /art/compiler/optimizing/ |
| code_generator_mips64.cc | 487 LoadOperandType load_type = double_slot ? kLoadDoubleword : kLoadWord;
665 LoadOperandType load_type = source.IsStackSlot() ? kLoadWord : kLoadDoubleword;
832 LoadOperandType load_type = mem_loc.IsStackSlot() ? kLoadWord : kLoadDoubleword;
[all...] |
| code_generator_mips.cc | [all...] |
