| /external/v8/src/ |
| globals.h | 711 MLS,
|
| /external/v8/src/arm/ |
| assembler-arm.cc | 60 answer |= 1u << SUDIV | 1u << MLS;
96 supported_ |= 1u << SUDIV | 1u << MLS;
107 if (FLAG_enable_mls) supported_ |= 1u << MLS;
122 if (FLAG_enable_mls && cpu.has_thumb2()) supported_ |= 1u << MLS;
212 "ARMv8=%d ARMv7=%d VFP3=%d VFP32DREGS=%d NEON=%d SUDIV=%d MLS=%d"
220 CpuFeatures::IsSupported(MLS),
1583 void Assembler::mls(Register dst, Register src1, Register src2, Register srcA, function in class:v8::internal::Assembler
[all...] |
| macro-assembler-arm.cc | 253 void MacroAssembler::Mls(Register dst, Register src1, Register src2,
255 if (CpuFeatures::IsSupported(MLS)) {
256 CpuFeatureScope scope(this, MLS);
257 mls(dst, src1, src2, srcA, cond);
[all...] |
| /external/v8/src/compiler/arm/ |
| instruction-selector-arm.cc | 292 if (selector->IsSupported(MLS)) {
850 if (IsSupported(MLS) && m.right().IsInt32Mul() &&
[all...] |
| code-generator-arm.cc | 559 CpuFeatureScope scope(masm(), MLS);
560 __ mls(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1),
[all...] |
| /external/v8/test/unittests/compiler/arm/ |
| instruction-selector-arm-unittest.cc | [all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| thumb2_bad_reg.s | 178 @ MLS
179 mls r13, r0, r0, r0
180 mls r15, r0, r0, r0
181 mls r0, r13, r0, r0
182 mls r0, r15, r0, r0
183 mls r0, r0, r13, r0
184 mls r0, r0, r15, r0
185 mls r0, r0, r0, r13
186 mls r0, r0, r0, r15
|
| /external/valgrind/none/tests/arm/ |
| v6intARM.stdout.exp | [all...] |
| v6media.stdout.exp | 15 MLS
16 mls r0, r1, r2, r3 :: rd 0x00000001 rm 0x00000000, rn 0x00000000 rs 0x00000001, carryin 0, cpsr 0x00000000 ge[3:0]=0000
17 mls r0, r1, r2, r3 :: rd 0x00000001 rm 0xffffffff, rn 0x00000000 rs 0x00000001, carryin 0, cpsr 0x00000000 ge[3:0]=0000
18 mls r0, r1, r2, r3 :: rd 0x00000001 rm 0x00000000, rn 0xffffffff rs 0x00000001, carryin 0, cpsr 0x00000000 ge[3:0]=0000
19 mls r0, r1, r2, r3 :: rd 0x00000000 rm 0xffffffff, rn 0xffffffff rs 0x00000001, carryin 0, cpsr 0x00000000 ge[3:0]=0000
20 mls r0, r1, r2, r3 :: rd 0x00000000 rm 0x7fffffff, rn 0x7fffffff rs 0x00000001, carryin 0, cpsr 0x00000000 ge[3:0]=0000
21 mls r0, r1, r2, r3 :: rd 0x00020000 rm 0x0000ffff, rn 0x0000ffff rs 0x00000001, carryin 0, cpsr 0x00000000 ge[3:0]=0000
[all...] |
| /external/llvm/test/MC/ARM/ |
| basic-arm-instructions.s | [all...] |
| basic-thumb2-instructions.s | [all...] |
