| /frameworks/opt/vcard/tests/src/com/android/vcard/tests/ |
| VCardParserTests.java | 38 private enum Order {
47 private final List<Order> mHistory = new ArrayList<Order>();
48 private final List<Order> mExpectedOrder = new ArrayList<Order>();
50 public MockVCardInterpreter addExpectedOrder(Order order) {
51 mExpectedOrder.add(order);
55 private void inspectOrder(Order order) {
[all...] |
| /external/libopus/silk/float/ |
| corrMatrix_FLP.c | 40 const silk_float *x, /* I x vector [L+order-1] used to create X */
43 const opus_int Order, /* I Max lag for correlation */
44 silk_float *Xt /* O X'*t correlation vector [order] */
50 ptr1 = &x[ Order - 1 ]; /* Points to first sample of column 0 of X: X[:,0] */
51 for( lag = 0; lag < Order; lag++ ) {
60 const silk_float *x, /* I x vector [ L+order-1 ] used to create X */
62 const opus_int Order, /* I Max lag for correlation */
63 silk_float *XX /* O X'*X correlation matrix [order x order] */
70 ptr1 = &x[ Order - 1 ]; /* First sample of column 0 of X *
[all...] |
| /external/llvm/lib/CodeGen/ |
| AllocationOrder.cpp | 1 //===-- llvm/CodeGen/AllocationOrder.cpp - Allocation Order ---------------===//
10 // This file implements an allocation order for virtual registers.
12 // The preferred allocation order for a virtual register depends on allocation
37 Order = RegClassInfo.getOrder(MF.getRegInfo().getRegClass(VirtReg));
38 TRI->getRegAllocationHints(VirtReg, Order, Hints, MF, &VRM, Matrix);
51 assert(std::find(Order.begin(), Order.end(), Hints[I]) != Order.end() &&
52 "Target hint is outside allocation order.");
|
| AllocationOrder.h | 1 //===-- llvm/CodeGen/AllocationOrder.h - Allocation Order -*- C++ -*-------===//
10 // This file implements an allocation order for virtual registers.
12 // The preferred allocation order for a virtual register depends on allocation
31 ArrayRef<MCPhysReg> Order;
44 /// Get the allocation order without reordered hints.
45 ArrayRef<MCPhysReg> getOrder() const { return Order; }
47 /// Return the next physical register in the allocation order, or 0.
54 Limit = Order.size();
56 unsigned Reg = Order[Pos++];
64 /// Limit'th register in the RegisterClassInfo allocation order
[all...] |
| /external/lzma/CPP/7zip/Compress/ |
| PpmdEncoder.h | 21 int Order;
27 Order = -1;
|
| /external/aac/libAACdec/src/ |
| aacdec_tns.h | 99 TNS_MAXIMUM_ORDER = 20, /* 12 for AAC-LC and AAC-SSR. Set to 20 for AAC-Main (AOT 1). Some broken encoders also do order 20 for AAC-LC :( */
113 UCHAR Order;
|
| /external/cblas/src/ |
| cblas_cgemm.c | 12 void cblas_cgemm(const enum CBLAS_ORDER Order, const enum CBLAS_TRANSPOSE TransA,
43 if( Order == CblasColMajor )
74 } else if (Order == CblasRowMajor)
105 else cblas_xerbla(1, "cblas_cgemm", "Illegal Order setting, %d\n", Order);
|
| cblas_chemm.c | 12 void cblas_chemm(const enum CBLAS_ORDER Order, const enum CBLAS_SIDE Side,
42 if( Order == CblasColMajor )
71 } else if (Order == CblasRowMajor)
102 else cblas_xerbla(1, "cblas_chemm", "Illegal Order setting, %d\n", Order);
|
| cblas_cher2k.c | 12 void cblas_cher2k(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo,
45 if( Order == CblasColMajor )
75 } else if (Order == CblasRowMajor)
107 else cblas_xerbla(1, "cblas_cher2k", "Illegal Order setting, %d\n", Order);
|
| cblas_cherk.c | 12 void cblas_cherk(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo,
40 if( Order == CblasColMajor )
70 } else if (Order == CblasRowMajor)
101 else cblas_xerbla(1, "cblas_cherk", "Illegal Order setting, %d\n", Order);
|
| cblas_csymm.c | 12 void cblas_csymm(const enum CBLAS_ORDER Order, const enum CBLAS_SIDE Side,
42 if( Order == CblasColMajor )
71 } else if (Order == CblasRowMajor)
102 else cblas_xerbla(1, "cblas_csymm", "Illegal Order setting, %d\n", Order);
|
| cblas_csyr2k.c | 12 void cblas_csyr2k(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo,
42 if( Order == CblasColMajor )
74 } else if (Order == CblasRowMajor)
104 else cblas_xerbla(1, "cblas_csyr2k", "Illegal Order setting, %d\n", Order);
|
| cblas_csyrk.c | 12 void cblas_csyrk(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo,
40 if( Order == CblasColMajor )
72 } else if (Order == CblasRowMajor)
103 else cblas_xerbla(1, "cblas_csyrk", "Illegal Order setting, %d\n", Order);
|
| cblas_dgemm.c | 12 void cblas_dgemm(const enum CBLAS_ORDER Order, const enum CBLAS_TRANSPOSE TransA,
43 if( Order == CblasColMajor )
74 } else if (Order == CblasRowMajor)
105 else cblas_xerbla(1, "cblas_dgemm", "Illegal Order setting, %d\n", Order);
|
| cblas_dsymm.c | 12 void cblas_dsymm(const enum CBLAS_ORDER Order, const enum CBLAS_SIDE Side,
42 if( Order == CblasColMajor )
71 } else if (Order == CblasRowMajor)
102 else cblas_xerbla(1, "cblas_dsymm","Illegal Order setting, %d\n", Order);
|
| cblas_dsyr2k.c | 12 void cblas_dsyr2k(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo,
42 if( Order == CblasColMajor )
74 } else if (Order == CblasRowMajor)
105 else cblas_xerbla(1, "cblas_dsyr2k","Illegal Order setting, %d\n", Order);
|
| cblas_dsyrk.c | 12 void cblas_dsyrk(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo,
40 if( Order == CblasColMajor )
72 } else if (Order == CblasRowMajor)
103 else cblas_xerbla(1, "cblas_dsyrk","Illegal Order setting, %d\n", Order);
|
| cblas_sgemm.c | 12 void cblas_sgemm(const enum CBLAS_ORDER Order, const enum CBLAS_TRANSPOSE TransA,
42 if( Order == CblasColMajor )
74 } else if (Order == CblasRowMajor)
107 "Illegal Order setting, %d\n", Order);
|
| cblas_ssymm.c | 12 void cblas_ssymm(const enum CBLAS_ORDER Order, const enum CBLAS_SIDE Side,
42 if( Order == CblasColMajor )
72 } else if (Order == CblasRowMajor)
104 "Illegal Order setting, %d\n", Order);
|
| cblas_ssyr2k.c | 12 void cblas_ssyr2k(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo,
42 if( Order == CblasColMajor )
75 } else if (Order == CblasRowMajor)
107 "Illegal Order setting, %d\n", Order);
|
| cblas_ssyrk.c | 12 void cblas_ssyrk(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo,
40 if( Order == CblasColMajor )
73 } else if (Order == CblasRowMajor)
105 "Illegal Order setting, %d\n", Order);
|
| cblas_zgemm.c | 12 void cblas_zgemm(const enum CBLAS_ORDER Order, const enum CBLAS_TRANSPOSE TransA,
43 if( Order == CblasColMajor )
74 } else if (Order == CblasRowMajor)
105 else cblas_xerbla(1, "cblas_zgemm", "Illegal Order setting, %d\n", Order);
|
| cblas_zhemm.c | 12 void cblas_zhemm(const enum CBLAS_ORDER Order, const enum CBLAS_SIDE Side,
42 if( Order == CblasColMajor )
71 } else if (Order == CblasRowMajor)
102 else cblas_xerbla(1, "cblas_zhemm", "Illegal Order setting, %d\n", Order);
|
| cblas_zher2k.c | 12 void cblas_zher2k(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo,
45 if( Order == CblasColMajor )
75 } else if (Order == CblasRowMajor)
106 } else cblas_xerbla(1, "cblas_zher2k", "Illegal Order setting, %d\n", Order);
|
| cblas_zherk.c | 12 void cblas_zherk(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo,
40 if( Order == CblasColMajor )
70 } else if (Order == CblasRowMajor)
101 else cblas_xerbla(1, "cblas_zherk", "Illegal Order setting, %d\n", Order);
|
