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    Searched refs:PATCHPOINT (Results 1 - 21 of 21) sorted by null

  /external/llvm/include/llvm/Target/
TargetOpcodes.h 107 PATCHPOINT = 18,
  /external/llvm/lib/CodeGen/
StackMapLivenessAnalysis.cpp 12 // live-out information to a stackmap or patchpoint intrinsic if present.
33 "enable-patchpoint-liveness", cl::Hidden, cl::init(true),
34 cl::desc("Enable PatchPoint Liveness Analysis Pass"));
44 /// a function and attaches the register live-out information to a patchpoint
47 /// This pass can be disabled via the -enable-patchpoint-liveness=false flag.
48 /// The pass skips functions that don't have any patchpoint intrinsics. The
128 // set to an instruction if we encounter a patchpoint instruction.
130 if (I->getOpcode() == TargetOpcode::PATCHPOINT) {
LocalStackSlotAllocation.cpp 292 // Debug value, stackmap and patchpoint instructions can't be out of
297 MI->getOpcode() == TargetOpcode::PATCHPOINT)
TargetInstrInfo.cpp 444 case TargetOpcode::PATCHPOINT: {
445 // For PatchPoint, the call args are not foldable.
480 report_fatal_error("cannot spill patchpoint subregister operand");
515 MI->getOpcode() == TargetOpcode::PATCHPOINT) {
516 // Fold stackmap/patchpoint.
793 MI->getOpcode() == TargetOpcode::PATCHPOINT) &&
795 // Fold stackmap/patchpoint.
    [all...]
StackMaps.cpp 51 "Unexpected additional definition in Patchpoint intrinsic.");
353 assert(MI.getOpcode() == TargetOpcode::PATCHPOINT && "expected patchpoint");
443 /// uint64 : PatchPoint ID
InlineSpiller.cpp     [all...]
MachineVerifier.cpp 836 if (MCID.getOpcode() == TargetOpcode::PATCHPOINT)
    [all...]
  /external/llvm/lib/Target/AArch64/
AArch64AsmPrinter.cpp 379 MII->getOpcode() == TargetOpcode::PATCHPOINT ||
391 // Lower a patchpoint of the form:
426 "Patchpoint can't request size less than the length of a call.");
541 case TargetOpcode::PATCHPOINT:
AArch64RegisterInfo.cpp 371 // Special handling of dbg_value, stackmap and patchpoint instructions.
373 MI.getOpcode() == TargetOpcode::PATCHPOINT) {
AArch64ISelLowering.cpp     [all...]
  /external/llvm/lib/Target/PowerPC/
PPCRegisterInfo.cpp 741 MI.getOpcode() == TargetOpcode::PATCHPOINT)
821 OpC != TargetOpcode::PATCHPOINT && !ImmToIdxMap.count(OpC);
848 OpC == TargetOpcode::PATCHPOINT)) {
    [all...]
PPCAsmPrinter.cpp 344 MII->getOpcode() == TargetOpcode::PATCHPOINT ||
356 // Lower a patchpoint of the form:
448 "Patchpoint can't request size less than the length of a call.");
505 case TargetOpcode::PATCHPOINT:
    [all...]
PPCInstrInfo.cpp     [all...]
PPCISelLowering.cpp     [all...]
  /external/llvm/lib/CodeGen/SelectionDAG/
InstrEmitter.cpp 754 // Handle STACKMAP and PATCHPOINT specially and then use the generic code.
755 if (Opc == TargetOpcode::STACKMAP || Opc == TargetOpcode::PATCHPOINT) {
760 if (Opc == TargetOpcode::PATCHPOINT) {
    [all...]
ScheduleDAGSDNodes.cpp 542 if (POpc == TargetOpcode::PATCHPOINT &&
544 // PATCHPOINT is defined to have one result, but it might really have none
    [all...]
FastISel.cpp 609 // passed to it) and emits NOPS (if requested). Unlike the patchpoint
718 // void|i64 @llvm.experimental.patchpoint.void|i64(i64 <id>,
740 "Not enough arguments provided to the patchpoint intrinsic");
835 // Insert the patchpoint instruction before the call generated by the target.
837 TII.get(TargetOpcode::PATCHPOINT));
    [all...]
SelectionDAGBuilder.cpp     [all...]
  /external/llvm/lib/Target/X86/
X86RegisterInfo.cpp 480 "EFLAGS are not live-out from a patchpoint.");
597 if (Opc == TargetOpcode::STACKMAP || Opc == TargetOpcode::PATCHPOINT) {
X86MCInstLower.cpp     [all...]
X86ISelLowering.cpp     [all...]

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