| /external/llvm/lib/CodeGen/ |
| RegisterClassInfo.cpp | 81 RCInfo &RCI = RegClass[RC->getID()];
86 if (!RCI.Order)
87 RCI.Order.reset(new MCPhysReg[NumRegs]);
112 RCI.Order[N++] = PhysReg;
116 RCI.NumRegs = N + CSRAlias.size();
117 assert (RCI.NumRegs <= NumRegs && "Allocation order larger than regclass");
125 RCI.Order[N++] = PhysReg;
130 if (StressRA && RCI.NumRegs > StressRA)
131 RCI.NumRegs = StressRA;
136 if (Super != RC && getNumAllocatableRegs(Super) > RCI.NumRegs
[all...] |
| TargetRegisterInfo.cpp | 224 for (SuperRegClassIterator RCI(B, this); RCI.isValid(); ++RCI)
225 if (RCI.getSubReg() == Idx)
228 return firstCommonClass(RCI.getMask(), A->getSubClassMask(), this);
|
| AggressiveAntiDepBreaker.h | 128 const RegisterClassInfo &RCI,
|
| ShrinkWrap.cpp | 100 RegisterClassInfo RCI;
160 RCI.runOnMachineFunction(MF);
237 UseOrDefCSR = RCI.getLastCalleeSavedAlias(PhysReg);
|
| RegisterPressure.cpp | 201 const RegisterClassInfo *rci,
211 RCI = rci;
654 const RegisterClassInfo *RCI,
664 unsigned Limit = RCI->getRegPressureSetLimit(i);
782 computeExcessPressureDelta(SavedPressure, CurrSetPressure, Delta, RCI,
848 unsigned Limit = RCI->getRegPressureSetLimit(PSetID);
[all...] |
| PostRASchedulerList.cpp | 196 const RegisterClassInfo &RCI,
212 (AntiDepBreaker *)new AggressiveAntiDepBreaker(MF, RCI, CriticalPathRCs) :
214 (AntiDepBreaker *)new CriticalAntiDepBreaker(MF, RCI) : nullptr));
|
| CriticalAntiDepBreaker.cpp | 31 const RegisterClassInfo &RCI)
34 TRI(MF.getSubtarget().getRegisterInfo()), RegClassInfo(RCI),
|
| RegAllocGreedy.cpp | 121 RegisterClassInfo RCI;
[all...] |
| TargetLoweringBase.cpp | [all...] |
| AggressiveAntiDepBreaker.cpp | 114 MachineFunction &MFi, const RegisterClassInfo &RCI,
118 TRI(MF.getSubtarget().getRegisterInfo()), RegClassInfo(RCI),
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| RegisterClassInfo.h | 71 const RCInfo &RCI = RegClass[RC->getID()];
72 if (Tag != RCI.Tag)
74 return RCI;
|
| RegisterPressure.h | 268 const RegisterClassInfo *RCI;
303 MF(nullptr), TRI(nullptr), RCI(nullptr), LIS(nullptr), MBB(nullptr), P(rp),
307 MF(nullptr), TRI(nullptr), RCI(nullptr), LIS(nullptr), MBB(nullptr), P(rp),
312 void init(const MachineFunction *mf, const RegisterClassInfo *rci,
|
| /external/llvm/lib/Transforms/Scalar/ |
| ConstantHoisting.cpp | 245 for (auto const &RCI : ConstInfo.RebasedConstants)
246 for (auto const &U : RCI.Uses)
554 for (auto const &RCI : ConstInfo.RebasedConstants) {
556 for (auto const &U : RCI.Uses)
557 emitBaseConstants(Base, RCI.Offset, U);
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64A57FPLoadBalancing.cpp | 118 RegisterClassInfo RCI;
320 RCI.runOnMachineFunction(F);
529 auto Ord = RCI.getOrder(TRI->getRegClass(RegClassID));
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| TargetLowering.cpp | [all...] |
