| /external/llvm/lib/CodeGen/ |
| AllocationOrder.cpp | 32 const RegisterClassInfo &RegClassInfo,
37 Order = RegClassInfo.getOrder(MF.getRegInfo().getRegClass(VirtReg));
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| AllocationOrder.h | 38 /// @param RegClassInfo Information about reserved and allocatable registers.
41 const RegisterClassInfo &RegClassInfo,
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| RegAllocBase.h | 66 RegisterClassInfo RegClassInfo;
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| RegAllocBase.cpp | 66 RegClassInfo.runOnMachineFunction(vrm.getMachineFunction());
131 RegClassInfo.getOrder(MRI->getRegClass(VirtReg->reg)).front());
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| CriticalAntiDepBreaker.h | 39 const RegisterClassInfo &RegClassInfo;
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| AggressiveAntiDepBreaker.h | 117 const RegisterClassInfo &RegClassInfo;
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| PostRASchedulerList.cpp | 82 RegisterClassInfo RegClassInfo;
273 RegClassInfo.runOnMachineFunction(Fn);
301 SchedulePostRATDList Scheduler(Fn, MLI, AA, RegClassInfo, AntiDepMode,
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| RegAllocGreedy.cpp | 661 AllocationOrder Order(VirtReg.reg, *VRM, RegClassInfo, Matrix);
765 RegClassInfo.getNumAllocatableRegs(MRI->getRegClass(VirtReg.reg)) <
766 RegClassInfo.getNumAllocatableRegs(MRI->getRegClass(Intf->reg)));
845 unsigned CSR = RegClassInfo.getLastCalleeSavedAlias(PhysReg);
[all...] |
| RegAllocBasic.cpp | 226 AllocationOrder Order(VirtReg.reg, *VRM, RegClassInfo, Matrix);
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| CriticalAntiDepBreaker.cpp | 34 TRI(MF.getSubtarget().getRegisterInfo()), RegClassInfo(RCI),
382 ArrayRef<MCPhysReg> Order = RegClassInfo.getOrder(RC);
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| RegAllocFast.cpp | 60 RegisterClassInfo RegClassInfo;
543 ArrayRef<MCPhysReg> AO = RegClassInfo.getOrder(RC);
[all...] |
| MachineScheduler.cpp | 97 RegClassInfo = new RegisterClassInfo();
101 delete RegClassInfo;
338 RegClassInfo->runOnMachineFunction(*MF);
877 TopRPTracker.init(&MF, RegClassInfo, LIS, BB, RegionBegin);
878 BotRPTracker.init(&MF, RegClassInfo, LIS, BB, LiveRegionEnd);
[all...] |
| AggressiveAntiDepBreaker.cpp | 118 TRI(MF.getSubtarget().getRegisterInfo()), RegClassInfo(RCI),
611 ArrayRef<MCPhysReg> Order = RegClassInfo.getOrder(SuperRC);
[all...] |
| RegisterCoalescer.cpp | 91 RegisterClassInfo RegClassInfo;
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineScheduler.h | 109 RegisterClassInfo *RegClassInfo;
358 RegisterClassInfo *RegClassInfo;
394 RegClassInfo(C->RegClassInfo), DFSResult(nullptr),
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| /external/llvm/lib/Target/ARM/ |
| ARMLoadStoreOptimizer.cpp | 85 RegisterClassInfo RegClassInfo;
537 RegClassInfo.runOnMachineFunction(*MF);
541 for (unsigned Reg : RegClassInfo.getOrder(&RegClass))
[all...] |
