| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cris/ |
| v32-err-8.s | 4 ; USP does not have the same register number in v10 as in v32.
6 move $r10,$usp ; { dg-error "(Illegal|Invalid) operands" }
7 move 0xfabb0,$usp ; { dg-error "(Illegal|Invalid) operands" }
8 move $usp,[$r5] ; { dg-error "(Illegal|Invalid) operands" }
9 move [$r12],$usp ; { dg-error "(Illegal|Invalid) operands" }
|
| rd-usp-1.d | 5 # Check that USP gets the right number for V10.
12 0: 3af6 move r10,usp
13 2: 3ffe b0ab 0f00 move (0xfabb0|fabb0 <.*>),usp
14 8: 75fa move usp,\[r5\]
15 a: 3cfa move \[r12\],usp
|
| rd-usp-1b.d | 5 # Check that USP gets the right number for V32.
12 0: 3ae6 move r10,usp
13 2: 3fee b0ab 0f00 move 0xfabb0,usp
14 8: 75ea move usp,\[r5\]
15 a: 3cea move \[r12\],usp
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/bfin/ |
| move2.s | 191 //genreg = USP ; /* (a)*/
192 R1 = USP;
193 P2 = USP;
194 SP = USP;
195 FP = USP;
196 A0.X = USP;
197 A1.W = USP;
199 //USP = genreg ; /* (a)*/
200 USP = R2;
201 USP = P4
[all...] |
| stack.d | 22 16: 38 01 USP = \[SP\+\+\];
|
| stack2.s | 50 [--SP ] = USP;
107 USP= [ SP ++ ] ;
|
| stack2.d | 38 3c: 78 01 \[--SP\] = USP;
74 84: 38 01 USP = \[SP\+\+\];
|
| move2.d | 156 128: c8 31 R1 = USP;
157 12a: d0 33 P2 = USP;
158 12c: f0 33 SP = USP;
159 12e: f8 33 FP = USP;
160 130: c0 39 A0.X = USP;
161 132: d8 39 A1.W = USP;
162 134: 02 3e USP = R2;
163 136: 44 3e USP = P4;
164 138: 46 3e USP = SP;
165 13a: 47 3e USP = FP
[all...] |
| move.d | 12 8: d8 39 A1.W = USP;
31 2e: e0 3d LT1 = USP;
|
| pseudo.s | 57 DBG USP;
|
| move.s | 8 a1.w = usp;
27 Lt1 = USP;
|
| pseudo.d | 53 5c: 38 f8 DBG USP;
|
| allinsn16.d | 320 [^:]+: 38 01 + USP = \[SP\+\+\];
384 [^:]+: 78 01 + \[--SP\] = USP;
[all...] |
| /toolchain/binutils/binutils-2.25/gas/config/ |
| m68k-parse.h | 96 USP, /* User Stack Pointer */
|
| tc-m68k.c | 160 SFC, DFC, USP, VBR,
164 SFC, DFC, USP, VBR, CACR, CAAR, MSP, ISP,
169 USP, VBR, MSP, ISP, MMUSR, URP, SRP,
174 USP, VBR, URP, SRP, PCR,
340 SFC, DFC, USP, VBR, CAC, MBO,
565 {mcfusp, NULL, "usp", 1},
[all...] |
| /toolchain/binutils/binutils-2.25/opcodes/ |
| m10300-opc.c | 220 #define USP (REGS+1)
224 #define SSP (USP+1)
495 { "mov", 0xf020, 0xfffc, 0, FMT_D0, AM33, {USP, AN0}},
499 { "mov", 0xf030, 0xfff3, 0, FMT_D0, AM33, {AN1, USP}},
[all...] |
