/bionic/libc/kernel/uapi/linux/ |
v4l2-dv-timings.h | 142 #define V4L2_DV_BT_DMT_1280X768P85 {.type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1280, 768, 0, V4L2_DV_VSYNC_POS_POL, 117500000, 80, 136, 216, 3, 7, 31, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, 0) \
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/development/ndk/platforms/android-21/include/linux/ |
v4l2-dv-timings.h | 80 #define V4L2_DV_BT_DMT_1280X768P85 { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1280, 768, 0, V4L2_DV_VSYNC_POS_POL, 117500000, 80, 136, 216, 3, 7, 31, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, 0) }
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/external/kernel-headers/original/uapi/linux/ |
v4l2-dv-timings.h | 446 #define V4L2_DV_BT_DMT_1280X768P85 { \
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/prebuilts/ndk/current/platforms/android-21/arch-arm/usr/include/linux/ |
v4l2-dv-timings.h | 80 #define V4L2_DV_BT_DMT_1280X768P85 { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1280, 768, 0, V4L2_DV_VSYNC_POS_POL, 117500000, 80, 136, 216, 3, 7, 31, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, 0) }
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/prebuilts/ndk/current/platforms/android-21/arch-arm64/usr/include/linux/ |
v4l2-dv-timings.h | 80 #define V4L2_DV_BT_DMT_1280X768P85 { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1280, 768, 0, V4L2_DV_VSYNC_POS_POL, 117500000, 80, 136, 216, 3, 7, 31, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, 0) }
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/prebuilts/ndk/current/platforms/android-21/arch-mips/usr/include/linux/ |
v4l2-dv-timings.h | 80 #define V4L2_DV_BT_DMT_1280X768P85 { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1280, 768, 0, V4L2_DV_VSYNC_POS_POL, 117500000, 80, 136, 216, 3, 7, 31, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, 0) }
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/prebuilts/ndk/current/platforms/android-21/arch-mips64/usr/include/linux/ |
v4l2-dv-timings.h | 80 #define V4L2_DV_BT_DMT_1280X768P85 { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1280, 768, 0, V4L2_DV_VSYNC_POS_POL, 117500000, 80, 136, 216, 3, 7, 31, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, 0) }
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/prebuilts/ndk/current/platforms/android-21/arch-x86/usr/include/linux/ |
v4l2-dv-timings.h | 80 #define V4L2_DV_BT_DMT_1280X768P85 { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1280, 768, 0, V4L2_DV_VSYNC_POS_POL, 117500000, 80, 136, 216, 3, 7, 31, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, 0) }
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/prebuilts/ndk/current/platforms/android-21/arch-x86_64/usr/include/linux/ |
v4l2-dv-timings.h | 80 #define V4L2_DV_BT_DMT_1280X768P85 { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1280, 768, 0, V4L2_DV_VSYNC_POS_POL, 117500000, 80, 136, 216, 3, 7, 31, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, 0) }
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/prebuilts/ndk/current/platforms/android-23/arch-arm/usr/include/linux/ |
v4l2-dv-timings.h | 80 #define V4L2_DV_BT_DMT_1280X768P85 { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1280, 768, 0, V4L2_DV_VSYNC_POS_POL, 117500000, 80, 136, 216, 3, 7, 31, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, 0) }
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/prebuilts/ndk/current/platforms/android-23/arch-arm64/usr/include/linux/ |
v4l2-dv-timings.h | 80 #define V4L2_DV_BT_DMT_1280X768P85 { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1280, 768, 0, V4L2_DV_VSYNC_POS_POL, 117500000, 80, 136, 216, 3, 7, 31, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, 0) }
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/prebuilts/ndk/current/platforms/android-23/arch-mips/usr/include/linux/ |
v4l2-dv-timings.h | 80 #define V4L2_DV_BT_DMT_1280X768P85 { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1280, 768, 0, V4L2_DV_VSYNC_POS_POL, 117500000, 80, 136, 216, 3, 7, 31, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, 0) }
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/prebuilts/ndk/current/platforms/android-23/arch-mips64/usr/include/linux/ |
v4l2-dv-timings.h | 80 #define V4L2_DV_BT_DMT_1280X768P85 { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1280, 768, 0, V4L2_DV_VSYNC_POS_POL, 117500000, 80, 136, 216, 3, 7, 31, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, 0) }
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/prebuilts/ndk/current/platforms/android-23/arch-x86/usr/include/linux/ |
v4l2-dv-timings.h | 80 #define V4L2_DV_BT_DMT_1280X768P85 { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1280, 768, 0, V4L2_DV_VSYNC_POS_POL, 117500000, 80, 136, 216, 3, 7, 31, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, 0) }
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/prebuilts/ndk/current/platforms/android-23/arch-x86_64/usr/include/linux/ |
v4l2-dv-timings.h | 80 #define V4L2_DV_BT_DMT_1280X768P85 { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1280, 768, 0, V4L2_DV_VSYNC_POS_POL, 117500000, 80, 136, 216, 3, 7, 31, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, 0) }
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/prebuilts/ndk/current/platforms/android-24/arch-arm/usr/include/linux/ |
v4l2-dv-timings.h | 80 #define V4L2_DV_BT_DMT_1280X768P85 { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1280, 768, 0, V4L2_DV_VSYNC_POS_POL, 117500000, 80, 136, 216, 3, 7, 31, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, 0) }
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/prebuilts/ndk/current/platforms/android-24/arch-arm64/usr/include/linux/ |
v4l2-dv-timings.h | 80 #define V4L2_DV_BT_DMT_1280X768P85 { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1280, 768, 0, V4L2_DV_VSYNC_POS_POL, 117500000, 80, 136, 216, 3, 7, 31, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, 0) }
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/prebuilts/ndk/current/platforms/android-24/arch-mips/usr/include/linux/ |
v4l2-dv-timings.h | 80 #define V4L2_DV_BT_DMT_1280X768P85 { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1280, 768, 0, V4L2_DV_VSYNC_POS_POL, 117500000, 80, 136, 216, 3, 7, 31, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, 0) }
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/prebuilts/ndk/current/platforms/android-24/arch-mips64/usr/include/linux/ |
v4l2-dv-timings.h | 80 #define V4L2_DV_BT_DMT_1280X768P85 { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1280, 768, 0, V4L2_DV_VSYNC_POS_POL, 117500000, 80, 136, 216, 3, 7, 31, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, 0) }
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/prebuilts/ndk/current/platforms/android-24/arch-x86/usr/include/linux/ |
v4l2-dv-timings.h | 80 #define V4L2_DV_BT_DMT_1280X768P85 { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1280, 768, 0, V4L2_DV_VSYNC_POS_POL, 117500000, 80, 136, 216, 3, 7, 31, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, 0) }
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/prebuilts/ndk/current/platforms/android-24/arch-x86_64/usr/include/linux/ |
v4l2-dv-timings.h | 80 #define V4L2_DV_BT_DMT_1280X768P85 { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1280, 768, 0, V4L2_DV_VSYNC_POS_POL, 117500000, 80, 136, 216, 3, 7, 31, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, 0) }
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