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  /external/mesa3d/src/gallium/drivers/i915/
i915_fpc_optimize.c 121 * of writemask which are set, swizzle to identity otherwise.
165 o->WriteMask = i->WriteMask;
210 is_unswizzled(&current->FullInstruction.Src[0], current->FullInstruction.Dst[0].Register.WriteMask) &&
211 is_unswizzled(&current->FullInstruction.Src[1], current->FullInstruction.Dst[0].Register.WriteMask) &&
212 is_unswizzled(&next->FullInstruction.Src[0], next->FullInstruction.Dst[0].Register.WriteMask) )
218 next->FullInstruction.Dst[0].Register.WriteMask,
221 current->FullInstruction.Dst[0].Register.WriteMask = current->FullInstruction.Dst[0].Register.WriteMask |
222 next->FullInstruction.Dst[0].Register.WriteMask;
    [all...]
  /external/mesa3d/src/gallium/drivers/r300/compiler/tests/
rc_test_helpers.c 203 struct match_info WriteMask;
236 tokens.WriteMask.String = dst_str + matches[3].rm_so;
237 tokens.WriteMask.Length = match_length(matches, 3);
258 /* WriteMask */
259 if (tokens.WriteMask.Length == 0) {
260 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW;
263 if (tokens.WriteMask.String[0] != '.') {
264 fprintf(stderr, "1st char of writemask is not valid.\n");
267 for (i = 1; i < tokens.WriteMask.Length; i++) {
268 switch(tokens.WriteMask.String[i])
    [all...]
  /external/mesa3d/src/mesa/drivers/dri/i965/
gen6_depthstencil.c 60 ds->ds1.stencil_write_mask = ctx->Stencil.WriteMask[0];
73 ds->ds1.bf_stencil_write_mask = ctx->Stencil.WriteMask[back];
79 if (ctx->Stencil.WriteMask[0] ||
80 (ctx->Stencil._TestTwoSide && ctx->Stencil.WriteMask[back]))
brw_cc.c 120 cc->cc1.stencil_write_mask = ctx->Stencil.WriteMask[0];
134 cc->cc2.bf_stencil_write_mask = ctx->Stencil.WriteMask[back];
140 if (ctx->Stencil.WriteMask[0] ||
141 (ctx->Stencil._TestTwoSide && ctx->Stencil.WriteMask[back]))
brw_wm_fp.c 139 reg.WriteMask = WRITEMASK_XYZW;
149 reg.WriteMask &= mask;
260 if (inst0->DstReg.WriteMask == 0)
263 dst_chan = ffs(inst0->DstReg.WriteMask) - 1;
266 inst->DstReg.WriteMask = 1 << dst_chan;
268 other_channel_mask = inst0->DstReg.WriteMask & ~(1 << dst_chan);
564 if (dst.WriteMask & WRITEMASK_Y) {
576 if (dst.WriteMask & WRITEMASK_XZ) {
592 if (dst.WriteMask & WRITEMASK_W) {
626 if (dst.WriteMask & WRITEMASK_YZ)
    [all...]
gen7_misc_state.c 115 dw1 |= ((ctx->Stencil.WriteMask != 0) << 27);
195 ((stencil_mt != NULL && ctx->Stencil.WriteMask != 0) << 27) |
  /external/mesa3d/src/gallium/drivers/r300/compiler/
radeon_pair_translate.c 90 *needrgb = (inst->DstReg.WriteMask & RC_MASK_XYZ) ? 1 : 0;
91 *needalpha = (inst->DstReg.WriteMask & RC_MASK_W) ? 1 : 0;
275 inst->DstReg.WriteMask);
286 pair->Alpha.DepthWriteMask |= GET_BIT(inst->DstReg.WriteMask, 3);
293 inst->DstReg.WriteMask & RC_MASK_XYZ;
295 GET_BIT(inst->DstReg.WriteMask, 3);
303 pair->RGB.WriteMask |= inst->DstReg.WriteMask & RC_MASK_XYZ;
307 pair->Alpha.WriteMask |= (GET_BIT(inst->DstReg.WriteMask, 3) << 3)
    [all...]
r3xx_fragprog.c 64 if (inst->DstReg.WriteMask & RC_MASK_Z) {
65 inst->DstReg.WriteMask = RC_MASK_W;
67 inst->DstReg.WriteMask = 0;
radeon_dataflow_deadcode.c 41 unsigned char WriteMask:4;
162 usedmask = *pused & inst->U.I.DstReg.WriteMask;
167 insts->WriteMask |= usedmask;
257 ptr->U.I.DstReg.WriteMask, srcmasks);
324 inst->U.I.DstReg.WriteMask = s.Instructions[ip].WriteMask;
325 if (s.Instructions[ip].WriteMask)
341 usemask = s.Instructions[ip].WriteMask;
radeon_variable.c 38 * Rewrite the index and writemask for the destination register of var
60 if (var_ptr->Dst.WriteMask == RC_MASK_W) {
156 unsigned int mask = var->Readers[i].WriteMask;
285 new->Dst.WriteMask = DstWriteMask;
320 unsigned int writemask; local
332 if (sub_inst->WriteMask) {
334 writemask = sub_inst->WriteMask;
337 writemask = sub_inst->OutputWriteMask;
339 writemask = 0
392 unsigned int writemask = 0; local
    [all...]
radeon_program_tex.c 92 inst_rcp->U.I.DstReg.WriteMask = RC_MASK_W;
173 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW;
183 inst_rcp->U.I.DstReg.WriteMask = RC_MASK_W;
194 inst_mul->U.I.DstReg.WriteMask = RC_MASK_W;
210 inst_add->U.I.DstReg.WriteMask = RC_MASK_W;
311 inst_frc->U.I.DstReg.WriteMask = RC_MASK_XYZ;
333 inst_mul->U.I.DstReg.WriteMask = RC_MASK_XYZ;
342 inst_frc->U.I.DstReg.WriteMask = RC_MASK_XYZ;
353 inst_mad->U.I.DstReg.WriteMask = RC_MASK_XYZ;
368 inst_add->U.I.DstReg.WriteMask = RC_MASK_XYZ
    [all...]
radeon_program.h 60 unsigned int WriteMask:4;
radeon_program_pair.h 74 unsigned int WriteMask:4;
radeon_dataflow.h 76 unsigned int WriteMask;
radeon_program_print.c 164 if (dst.WriteMask != RC_MASK_XYZW) {
166 rc_print_mask(f, dst.WriteMask);
389 if (inst->RGB.WriteMask)
391 (inst->RGB.WriteMask & 1) ? "x" : "",
392 (inst->RGB.WriteMask & 2) ? "y" : "",
393 (inst->RGB.WriteMask & 4) ? "z" : "");
428 if (inst->Alpha.WriteMask)
  /external/mesa3d/src/mesa/program/
prog_instruction.c 54 inst[i].DstReg.WriteMask = WRITEMASK_XYZW;
307 if (inst->DstReg.WriteMask == WRITEMASK_X ||
308 inst->DstReg.WriteMask == WRITEMASK_Y ||
309 inst->DstReg.WriteMask == WRITEMASK_Z ||
310 inst->DstReg.WriteMask == WRITEMASK_W ||
311 inst->DstReg.WriteMask == 0x0) {
323 if (inst->DstReg.WriteMask & (1 << chan)) {
prog_optimize.c 88 channel_mask = inst->DstReg.WriteMask & dst_mask;
134 const GLuint mask = mov->DstReg.WriteMask;
331 inst->DstReg.WriteMask & (1 << chan)) {
333 printf("Remove writemask on %u.%c\n", i,
336 inst->DstReg.WriteMask &= ~(1 << chan);
341 if (inst->DstReg.WriteMask == 0) {
421 mask &= ~inst->DstReg.WriteMask;
523 dst_mask = mov->DstReg.WriteMask;
573 dst_mask &= ~inst2->DstReg.WriteMask;
581 src_mask &= ~inst2->DstReg.WriteMask;
    [all...]
programopt.c 93 newInst[i].DstReg.WriteMask = (WRITEMASK_X << i);
165 newInst[0].DstReg.WriteMask = WRITEMASK_XYZW;
177 newInst[i].DstReg.WriteMask = WRITEMASK_XYZW;
192 newInst[3].DstReg.WriteMask = WRITEMASK_XYZW;
324 inst->DstReg.WriteMask = WRITEMASK_X;
345 inst->DstReg.WriteMask = WRITEMASK_X;
359 inst->DstReg.WriteMask = WRITEMASK_X;
372 inst->DstReg.WriteMask = WRITEMASK_X;
384 inst->DstReg.WriteMask = WRITEMASK_XYZ;
399 inst->DstReg.WriteMask = WRITEMASK_W
    [all...]
nvvertparse.c 603 dstReg->WriteMask = 0;
606 dstReg->WriteMask |= WRITEMASK_X;
610 dstReg->WriteMask |= WRITEMASK_Y;
614 dstReg->WriteMask |= WRITEMASK_Z;
618 dstReg->WriteMask |= WRITEMASK_W;
622 RETURN_ERROR1("Bad writemask character");
627 dstReg->WriteMask = WRITEMASK_XYZW;
982 inst->DstReg.WriteMask = WRITEMASK_X;
    [all...]
  /external/mesa3d/src/mesa/main/
stencil.c 259 * Updates gl_stencil_attrib::WriteMask. On change flushes the vertices and
276 if (ctx->Stencil.WriteMask[face] == mask)
279 ctx->Stencil.WriteMask[face] = mask;
290 if (ctx->Stencil.WriteMask[0] == mask &&
291 ctx->Stencil.WriteMask[1] == mask)
294 ctx->Stencil.WriteMask[0] = ctx->Stencil.WriteMask[1] = mask;
536 ctx->Stencil.WriteMask[0] = mask;
539 ctx->Stencil.WriteMask[1] = mask;
566 ctx->Stencil.WriteMask[0] != ctx->Stencil.WriteMask[face])
    [all...]
  /external/mesa3d/src/gallium/auxiliary/draw/
draw_pipe_aapoint.c 245 newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XY;
259 newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_X;
276 newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_X;
288 newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_X;
301 newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_Y;
334 newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_Z;
350 newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_Z;
363 newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_Y;
379 newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_W;
395 newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_Y
    [all...]
  /external/mesa3d/src/gallium/auxiliary/tgsi/
tgsi_exec.c 585 uint writemask = inst->Dst[0].Register.WriteMask; local
586 if (writemask == TGSI_WRITEMASK_X ||
587 writemask == TGSI_WRITEMASK_Y ||
588 writemask == TGSI_WRITEMASK_Z ||
589 writemask == TGSI_WRITEMASK_W ||
590 writemask == TGSI_WRITEMASK_NONE) {
606 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
    [all...]
  /external/mesa3d/src/mesa/drivers/dri/nouveau/
nv04_state_raster.c 173 if (ctx->Stencil.WriteMask[0])
182 ctx->Stencil.WriteMask[0] << 24;
  /external/mesa3d/src/mesa/state_tracker/
st_atom_depth.c 107 dsa->depth.writemask = ctx->Depth.Mask;
118 dsa->stencil[0].writemask = ctx->Stencil.WriteMask[0] & 0xff;
129 dsa->stencil[1].writemask = ctx->Stencil.WriteMask[back] & 0xff;
  /external/mesa3d/src/mesa/drivers/dri/r200/
r200_vertprog.c 696 dst.WriteMask & WRITEMASK_X) {
712 t_dst_mask(dst.WriteMask));
741 t_dst_mask(dst.WriteMask));
758 t_dst_mask(dst.WriteMask));
777 t_dst_mask(dst.WriteMask));
803 t_dst_mask(dst.WriteMask));
826 t_dst_mask(dst.WriteMask));
841 t_dst_mask(dst.WriteMask));
856 t_dst_mask(dst.WriteMask));
875 t_dst_mask(dst.WriteMask));
    [all...]

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